From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9486814F61; Tue, 2 Jan 2024 15:31:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="XRLL16sf" Received: from pps.filterd (m0279865.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.24/8.17.1.24) with ESMTP id 402D8pNk020065; Tue, 2 Jan 2024 15:31:19 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= message-id:date:mime-version:subject:to:cc:references:from :in-reply-to:content-type:content-transfer-encoding; s= qcppdkim1; bh=lDtf2yre3CHbHwFqMRpQkgfzeX46qTuOhHDrcKGjTFE=; b=XR LL16sf0jTEnvYyleBbteQfQukUA3oCi0GEM39sNyy21MrhsoqrPAOKi4rldT1ig8 WJ2aN8MO7RCSd/MfnD/Ef2r7i6ljC/hgZHcn8ZkcWy90dzqPzD2XkUW8oSjStytO AV6iCgF4ncLa2qgWM0CMUraD0mpSGV1hr5Bm0RrGpWVbshow0XGYLGbTVBykTCYy PizErmTEVZ6iA/P0e9T1kh4C/al/+aDv8pbveiTW5Xjnvg4S6htsK8+p2dY7DRj3 C1o3pVAwdV/ZQKh/D+orpkmGCojRi/BrMJmLd6GYaf/Pnf8D0En8xBO7Fcf5ofEf n1kmFqbmwhUsemzWictw== Received: from nalasppmta05.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3vcets8r0d-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 02 Jan 2024 15:31:18 +0000 (GMT) Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA05.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 402FVHY9011440 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 2 Jan 2024 15:31:17 GMT Received: from [10.226.59.182] (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Tue, 2 Jan 2024 07:31:16 -0800 Message-ID: Date: Tue, 2 Jan 2024 08:31:15 -0700 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101 Thunderbird/91.6.0 Subject: Re: [PATCH] bus: mhi: host: Add sysfs entry to force device to enter EDL Content-Language: en-US To: Qiang Yu , CC: , , , , , Bhaumik Bhatt References: <1703490474-84730-1-git-send-email-quic_qianyu@quicinc.com> From: Jeffrey Hugo In-Reply-To: <1703490474-84730-1-git-send-email-quic_qianyu@quicinc.com> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: B5w_5oXH-FR3M0xJRU0A0poC8oTtCObB X-Proofpoint-GUID: B5w_5oXH-FR3M0xJRU0A0poC8oTtCObB X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-12-09_01,2023-12-07_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 suspectscore=0 bulkscore=0 clxscore=1011 priorityscore=1501 spamscore=0 lowpriorityscore=0 phishscore=0 malwarescore=0 mlxlogscore=753 adultscore=0 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2311290000 definitions=main-2401020119 On 12/25/2023 12:47 AM, Qiang Yu wrote: > From: Bhaumik Bhatt > > Forcing the device (eg. SDX75) to enter Emergency Download Mode involves > writing the 0xEDEDEDED cookie to the channel 91 doorbell register and > forcing an SOC reset afterwards. Allow users of the MHI bus to exercise the > sequence using a sysfs entry. I don't see this documented in the spec anywhere. Is this standard behavior for all MHI devices? What about devices that don't support EDL mode? How should the host avoid using this special cookie when EDL mode is not desired? -Jeff