From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-10630.protonmail.ch (mail-10630.protonmail.ch [79.135.106.30]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2D065221F11 for ; Thu, 12 Feb 2026 15:33:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=79.135.106.30 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770910424; cv=none; b=Nel1s0j6dJ9wsB4aaumdqd4kl+ECJ6g42Rrjc1reKt0xDwHzJThpofFpSgAT/3AOdNua+HQSBoooP+kuh0PgQZtaM0g/ZlWaqbAylUZJkOYjQ/6hcueHxulPdi6U+H37rkiRo9hqLhTUsMwdN6tRLUTNWHvZnXMFoG6EQ3zYvic= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770910424; c=relaxed/simple; bh=c0Q4TTe8Ubo+5RYrK8d1+DZp3Zu2UOKNt8qVv5xau8o=; h=Date:To:From:Cc:Subject:Message-ID:MIME-Version:Content-Type; b=GdtTWWy/kqOCjfAivLyY4g1P6q43PvLJdotSoGZ3uR6IyxyqvYbIXToyk0qZFVuF8P0fz6mmrRnUPmKHwZ92WOLTFKShb04CHsC6hAo0hHrWwOVT9l0kUmH4XZU8X4R8FdF4/t14iyNMhmy9MqPcZDDNXn6lluFrpgcl9i+MGoo= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=pm.me; spf=pass smtp.mailfrom=pm.me; dkim=pass (2048-bit key) header.d=pm.me header.i=@pm.me header.b=C7nWtL/P; arc=none smtp.client-ip=79.135.106.30 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=pm.me Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=pm.me Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=pm.me header.i=@pm.me header.b="C7nWtL/P" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=pm.me; s=protonmail3; t=1770910414; x=1771169614; bh=lKy6vKT2TWSZanHR1ARvsOmI/YID1LOtkfg9it4g2W8=; h=Date:To:From:Cc:Subject:Message-ID:Feedback-ID:From:To:Cc:Date: Subject:Reply-To:Feedback-ID:Message-ID:BIMI-Selector; b=C7nWtL/PO1uOrUfPcDpV0k7MGLnvt/E8ivW3bB7MG0nxGlDkPLy8bCQwWyPFUAiIx EDMlDyY+qIGOu0u4a+RX7cG/MlUmmCtszkihndPMhMpTn4srhH5CdiOFzGAWc+qARD 6BYjMXIwE9eigpMhCiWhdW6Gu4zMq/yz2xlNVFXQCK2YuZV1n9SAOOBKpdt858R6Pm QLU11QUaM1EF0PFbux71IEtgTZPTACpEQDNTMcxiIYgO2u6epv/tPMwSYAKE7fqLrj l4F3LIumI45oP8BwjJUz6GUI63hl+OmUdLXcLPcve1S0oMH+wAW2FhZZmi5MfUGFDb Ej4j04trF233A== Date: Thu, 12 Feb 2026 15:33:28 +0000 To: brgerst@gmail.com, bp@alien8.de, ebiggers@google.com, jackmanb@google.com, peterz@infradead.org, pawan.kumar.gupta@linux.intel.com, maciej.wieczor-retman@intel.com, mingo@redhat.com, dave.hansen@linux.intel.com, babu.moger@amd.com, sohil.mehta@intel.com, elena.reshetova@intel.com, hpa@zytor.com, ubizjak@gmail.com, chang.seok.bae@intel.com, darwi@linutronix.de, ak@linux.intel.com, tglx@kernel.org, nik.borisov@suse.com, xin@zytor.com From: Maciej Wieczor-Retman Cc: linux-kernel@vger.kernel.org, x86@kernel.org, m.wieczorretman@pm.me, pawel.chmielewski@linux.intel.com Subject: [PATCH v5 0/3] x86: Capability bits fix and required bits sanity check Message-ID: Feedback-ID: 164464600:user:proton X-Pm-Message-ID: 85415f6677e4220a599d069614fc27962f636c54 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Series aims to fix the inconsistency between the cpuinfo behavior and the documentation. Specifically the features that are not compiled are still present in the cpuinfo bitmasks as enabled. This is not in line with the documentation which specifies that not-compiled features are not present in /proc/cpuinfo. Along adding the disabled feature bitmask initializer array, the complementary required bitmask initializer is also added. It can be used to provide a sanity check, after the cpu identification is finished, to make sure every required bit is set in the final bitmask. A warning with the cpu number and all required bits that were not set is emitted in case of the sanity check failure. Before adding the sanity check a small cleanup can be done. Three places open code an operation that retrieves either a feature string or, if the string is not present, the feature number in word:bit format. One of these places also doesn't check whether the string is actually there or not. The cleanup patch fixes that and simplifies the other two instances. Previous patchset versions: v4: https://lore.kernel.org/all/20250724125346.2792543-1-maciej.wieczor-ret= man@intel.com/ v3: https://lore.kernel.org/all/20250724094554.2153919-1-maciej.wieczor-ret= man@intel.com/ v2: https://lore.kernel.org/all/20250723092250.3411923-1-maciej.wieczor-ret= man@intel.com/ v1: https://lore.kernel.org/all/20250722074439.4069992-1-maciej.wieczor-ret= man@intel.com/ Maciej Wieczor-Retman (3): x86/cpu: Clear feature bits disabled at compile-time x86/cpu: Check if feature string is non-zero x86/cpu: Required feature bits sanity check arch/x86/kernel/cpu/common.c | 60 +++++++++++++++++++++++++++--- arch/x86/kernel/cpu/cpuid-deps.c | 21 ++--------- arch/x86/tools/cpufeaturemasks.awk | 6 +++ include/linux/cpu.h | 2 + 4 files changed, 65 insertions(+), 24 deletions(-) --=20 2.53.0