From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-43100.protonmail.ch (mail-43100.protonmail.ch [185.70.43.100]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 97E08278156 for ; Fri, 20 Feb 2026 12:43:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.70.43.100 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771591428; cv=none; b=aqXQjVJGCn+/1xUdUpx0fOsEVqf2Y6jXp6FNw2+D9M1woisYiIOobuu88x5QwMIoATxLTCm+ZG1s83L4lELhusUJEqnB+wz/5hGTiU+r89gVR1CVQxW9rbrxEPO89Y2JU0vMQ3NVwcSczj3z2PuzSigsjkYNN2fQ84ybLG9v6iI= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771591428; c=relaxed/simple; bh=5aLk3A+4vk4JTdUFBhe/keAF2Y5zXtJS08OYoWl0B8I=; h=Date:To:From:Cc:Subject:Message-ID:MIME-Version:Content-Type; b=HG3x2PWvhWJKM2IcllSmmhzvuhkdvJGneOuZH8oZk1nEig7ZWto4nG6lOrVvCD7lbSPbtXlKFFJBWhNp7F0ZTQVOGvD8x9I7KsDqtcokIeJAQ6mfxKY058k3iF3A4yAmJ557z/pK8+zZiobHtz+D+s4BgHW2pAXVgs7P94W8KC4= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=pm.me; spf=pass smtp.mailfrom=pm.me; dkim=pass (2048-bit key) header.d=pm.me header.i=@pm.me header.b=FbnTNBKJ; arc=none smtp.client-ip=185.70.43.100 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=pm.me Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=pm.me Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=pm.me header.i=@pm.me header.b="FbnTNBKJ" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=pm.me; s=protonmail3; t=1771591418; x=1771850618; bh=FHWdY0KqQKCu0lQksvPe8ybpkTLYUAZPF1+aR/kF2u8=; h=Date:To:From:Cc:Subject:Message-ID:Feedback-ID:From:To:Cc:Date: Subject:Reply-To:Feedback-ID:Message-ID:BIMI-Selector; b=FbnTNBKJMc/3/wjush+UKk7G0pZYKeg8pCfUWzzjgn4PF6i0XTeFC/xI6SD5qjs3P igmAOXJPSAhSLLaiURFw1+nELMt2+iA7ybduefPkeMvZEQzSw3yY3AH+mqL1AyTL/T /eKWoXyenwCgaxSCP9Nv14g9qKIuJDFXyREvrajT5a3Gtzq7+ni/e9hbWQu3EGZybX K+y3kzFUE0ziZycLpi2Wl3HczRe6/RQU1MTzgkMi9iKECL0ooJJo7qFca89KyNgxC3 lvUbSdBiU3t0EJNI+fgL8CSb/cP9DcJ1dxuWPYczidL1K68s3vKne04e0VeWQMyeig f9HkqlnUm2aIQ== Date: Fri, 20 Feb 2026 12:43:32 +0000 To: kai.huang@intel.com, pawan.kumar.gupta@linux.intel.com, babu.moger@amd.com, ak@linux.intel.com, peterz@infradead.org, chang.seok.bae@intel.com, bp@alien8.de, brgerst@gmail.com, nik.borisov@suse.com, darwi@linutronix.de, xin@zytor.com, dave.hansen@linux.intel.com, ebiggers@google.com, maciej.wieczor-retman@intel.com, hpa@zytor.com, mingo@redhat.com, sohil.mehta@intel.com, jackmanb@google.com, tglx@kernel.org From: Maciej Wieczor-Retman Cc: x86@kernel.org, linux-kernel@vger.kernel.org, m.wieczorretman@pm.me Subject: [PATCH v6 0/3] x86: Capability bits fix and required bits sanity check Message-ID: Feedback-ID: 164464600:user:proton X-Pm-Message-ID: d52366a0db8bd3a6c7bf3b9505fbbd375116bd93 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Series aims to fix the inconsistency between the cpuinfo behavior and the documentation. Specifically the features that are not compiled are still present in the cpuinfo bitmasks as enabled. This is not in line with the documentation which specifies that not-compiled features are not present in /proc/cpuinfo. Along adding the disabled feature bitmask initializer array, the complementary required bitmask initializer is also added. It can be used to provide a sanity check, after the cpu identification is finished, to make sure every required bit is set in the final bitmask. A warning with the cpu number and all required bits that were not set is emitted in case of the sanity check failure. Before adding the sanity check a small cleanup can be done. Three places open code an operation that retrieves either a feature string or, if the string is not present, the feature number in word:bit format. One of these places also doesn't check whether the string is actually there or not. The cleanup patch fixes that and simplifies the other two instances. Previous patchset versions: v5: https://lore.kernel.org/all/cover.1770908783.git.m.wieczorretman@pm.me/ v4: https://lore.kernel.org/all/20250724125346.2792543-1-maciej.wieczor-ret= man@intel.com/ v3: https://lore.kernel.org/all/20250724094554.2153919-1-maciej.wieczor-ret= man@intel.com/ v2: https://lore.kernel.org/all/20250723092250.3411923-1-maciej.wieczor-ret= man@intel.com/ v1: https://lore.kernel.org/all/20250722074439.4069992-1-maciej.wieczor-ret= man@intel.com/ Maciej Wieczor-Retman (3): x86/cpu: Clear feature bits disabled at compile-time x86/cpu: Check if feature string is non-zero x86/cpu: Do a sanity check on required feature bits arch/x86/kernel/cpu/common.c | 62 +++++++++++++++++++++++++++--- arch/x86/kernel/cpu/cpuid-deps.c | 20 ++-------- arch/x86/tools/cpufeaturemasks.awk | 6 +++ include/linux/cpu.h | 2 + 4 files changed, 67 insertions(+), 23 deletions(-) --=20 2.53.0