From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-244123.protonmail.ch (mail-244123.protonmail.ch [109.224.244.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6C03B2AD03 for ; Mon, 2 Mar 2026 15:24:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=109.224.244.123 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772465082; cv=none; b=dWPvwkTBCsuX1AL1BWJuHOIzq1A9/SOuxCBQYyNkNwd1b6TvGOWUTt57kKvThymSgPNHfbGMVxP1YwVrggHuUBhbYEmN8YRVVHQuaAc+fDQh7EtqdaGUY2HN1Z2EDNdmG+hcXF2Hbw4Izip5xm4hnLrVvIufQCeAzPsLOpH6z/0= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772465082; c=relaxed/simple; bh=6r0TEW8g85yKIovxPpP973xtyM73D86i1ZzFNdptN4U=; h=Date:To:From:Cc:Subject:Message-ID:MIME-Version:Content-Type; b=OurDchoSda1A+3KeSgmkKU9+20VICVepL4Zz437ljXeaOLDXrtw7QVLnCOH5buaaKFekl9x1D3Ge+J51TqrtyMCmpa/pNHcZ1TNxnMwuEu2Ya47GquoO0auvBymqKlrxrCqM2Btqt3B0ZVeleUP1TjsWQQgq0/Hlqbx0uQzi5x4= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=pm.me; spf=pass smtp.mailfrom=pm.me; dkim=pass (2048-bit key) header.d=pm.me header.i=@pm.me header.b=Z9nL4PBF; arc=none smtp.client-ip=109.224.244.123 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=pm.me Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=pm.me Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=pm.me header.i=@pm.me header.b="Z9nL4PBF" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=pm.me; s=protonmail3; t=1772465073; x=1772724273; bh=b0kqjKGb4Hj1oDwujUEPnwl/H+xVMbBJ2lLiAjaeIk4=; h=Date:To:From:Cc:Subject:Message-ID:Feedback-ID:From:To:Cc:Date: Subject:Reply-To:Feedback-ID:Message-ID:BIMI-Selector; b=Z9nL4PBF5+7VkC5hiNo/h0TqJ8WJYbqgu8ymtsfXQa04rQxKvmf83wPtk/jrNJMlF NrFk85h5i2K5B2RJxgs/iCgUknC1DgEwF4LueJ++O3ZgaqiOtFxi0LWUrvdrJV2VI5 QBNYP2kYzo/NvYGv77mBRMHZI7z1UxnE0OJLPSeq18Mw2Mp10GA3BVDFhu4ihonC1F B7sW7POzlnj9V1OwehBGXpKe93ebJmlATcLai+YBrEaUnOPZU6RRk0dOe5s8ATpUwn XYvYE/jz5G14a0j1EZGMXOlb3klKAF4l7okqtpXnZJPYX8ILfg7u6LBVh0haGp3oR0 ZQiZ0PA/l3P2g== Date: Mon, 02 Mar 2026 15:24:29 +0000 To: chang.seok.bae@intel.com, bp@alien8.de, nik.borisov@suse.com, brgerst@gmail.com, hpa@zytor.com, jarkko@kernel.org, darwi@linutronix.de, jackmanb@google.com, mingo@redhat.com, pawan.kumar.gupta@linux.intel.com, ak@linux.intel.com, elena.reshetova@intel.com, xin@zytor.com, peterz@infradead.org, tglx@kernel.org, dave.hansen@linux.intel.com, sohil.mehta@intel.com, maciej.wieczor-retman@intel.com From: Maciej Wieczor-Retman Cc: x86@kernel.org, linux-kernel@vger.kernel.org, m.wieczorretman@pm.me Subject: [PATCH v8 0/3] x86: Capability bits fix and required bits sanity check Message-ID: Feedback-ID: 164464600:user:proton X-Pm-Message-ID: 6a8eb85176b8a9e70f42d42a5d991d73949082b9 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Series aims to fix the inconsistency between the cpuinfo behavior and the documentation. Specifically the features that are not compiled are still present in the cpuinfo bitmasks as enabled. This is not in line with the documentation which specifies that not-compiled features are not present in /proc/cpuinfo. Along adding the disabled feature bitmask initializer array, the complementary required bitmask initializer is also added. It can be used to provide a sanity check, after the cpu identification is finished, to make sure every required bit is set in the final bitmask. A warning with the cpu number and all required bits that were not set is emitted in case of the sanity check failure. Before adding the sanity check a small cleanup can be done. Three places open code an operation that retrieves either a feature string or, if the string is not present, the feature number in word:bit format. One of these places also doesn't check whether the string is actually there or not. The cleanup patch fixes that and simplifies the other two instances. Patches are based on v7.0-rc2 Previous patchset versions: v7: https://lore.kernel.org/all/cover.1771936214.git.m.wieczorretman@pm.me/ v6: https://lore.kernel.org/all/cover.1771590895.git.m.wieczorretman@pm.me/ v5: https://lore.kernel.org/all/cover.1770908783.git.m.wieczorretman@pm.me/ v4: https://lore.kernel.org/all/20250724125346.2792543-1-maciej.wieczor-ret= man@intel.com/ v3: https://lore.kernel.org/all/20250724094554.2153919-1-maciej.wieczor-ret= man@intel.com/ v2: https://lore.kernel.org/all/20250723092250.3411923-1-maciej.wieczor-ret= man@intel.com/ v1: https://lore.kernel.org/all/20250722074439.4069992-1-maciej.wieczor-ret= man@intel.com/ Maciej Wieczor-Retman (3): x86/cpu: Clear feature bits disabled at compile-time x86/cpu: Check if feature string is non-zero x86/cpu: Do a sanity check on required feature bits arch/x86/include/asm/cpu.h | 2 + arch/x86/kernel/cpu/common.c | 62 +++++++++++++++++++++++++++--- arch/x86/kernel/cpu/cpuid-deps.c | 20 ++-------- arch/x86/tools/cpufeaturemasks.awk | 6 +++ 4 files changed, 67 insertions(+), 23 deletions(-) --=20 2.53.0