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The timer's clk_get() returns -EPROBE_DEFER, which timer_probe() does not report, and the timer is never registered because TIMER_OF_DECLARE() callbacks are not retried. Rather than moving the whole clock manager to CLK_OF_DECLARE() as v1 did, this version keeps the platform driver and, following clk-mt8173-infracfg.c, uses CLK_OF_DECLARE_DRIVER() to register only l4_sp_clk and the clocks its rate depends on from of_clk_init(): Agilex/N5X: boot_clk, main_pll, periph_pll, main_pll_c1, peri_pll_c1, noc_free_clk, l4_sp_clk Agilex5: boot_clk, main_pll, periph_pll, main_pll_c3, peri_pll_c1, noc_free_clk, l4_sp_clk Stratix10: boot_clk, main_pll, periph_pll, main_noc_base_clk, peri_noc_base_clk, noc_free_clk, l4_sp_clk All other clock IDs return -EPROBE_DEFER until the platform driver probes, registers the remaining clocks into the same provider and turns any unused IDs into -ENOENT. If the early registration fails, probe falls back to registering everything as before. Boot-tested on Agilex7 (FM61), Stratix10 L-tile and Agilex5 (065B Premium devkit), comparing each board with and without this series: - with the series, timer1 is registered as a clocksource within 0.5 ms of boot and timer0 as the broadcast clockevent device; without it, neither is registered and bc_hrtimer is used for broadcast instead - the clock manager still binds as a platform device, no devices are left deferred, and clocks registered at probe (EMAC, SD/MMC, USB, DMA, watchdog) have their expected rates and consumers eASIC N5X is compile-tested only. Changes in v2: - Keep the clock managers as platform drivers instead of converting them to CLK_OF_DECLARE() (Brian) - Register only l4_sp_clk and its parents early, using CLK_OF_DECLARE_DRIVER() as in clk-mt8173-infracfg.c, instead of the whole controller (Jerome) - Return the result of of_clk_add_hw_provider() from probe - Update subjects and commit messages to match the new approach v1: https://lore.kernel.org/all/cover.1789096458.git.adrian.ho.yin.ng@altera.com/ Adrian Ng Ho Yin (3): clk: socfpga: agilex: register the SP timer clocks early clk: socfpga: agilex5: register the SP timer clocks early clk: socfpga: stratix10: register the SP timer clocks early drivers/clk/socfpga/clk-agilex.c | 222 +++++++++++++++++++++++------- drivers/clk/socfpga/clk-agilex5.c | 138 +++++++++++++++---- drivers/clk/socfpga/clk-s10.c | 133 ++++++++++++++---- 3 files changed, 385 insertions(+), 108 deletions(-) base-commit: 1e7f56205813a2c48cdb3e9a4b0a24f49fd9a548 -- 2.49.GIT