From: Michael McAllister <me@michaelmcallister.org>
To: Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
Dmitry Baryshkov <lumag@kernel.org>
Cc: Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Rob Clark <robin.clark@oss.qualcomm.com>,
Abhinav Kumar <abhinav.kumar@linux.dev>,
Jessica Zhang <jesszhan0024@gmail.com>,
Sean Paul <sean@poorly.run>,
Marijn Suijten <marijn.suijten@somainline.org>,
Adam Skladowski <a39.skl@gmail.com>,
linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org,
freedreno@lists.freedesktop.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: [PATCH 0/2] Fix SM6115 MDSS register access during runtime resume
Date: Sat, 24 Oct 2026 15:27:59 +0100 [thread overview]
Message-ID: <cover.1792852079.git.me@michaelmcallister.org> (raw)
Hi,
This fixes garbled compressed scanout on my device (Moto G10, SM4250)
after display power cycling. MDSS needs the DISPCC AHB clock before the
DPU child resumes, so this adds it to the binding and shared SM6115 clock
list. I tested this on 7.2.9 and power-cycled the display 20 times.
Michael McAllister (2):
dt-bindings: display: msm: sm6115-mdss: Add missing AHB clock
arm64: dts: qcom: sm6115: Add missing MDSS AHB clock
.../devicetree/bindings/display/msm/qcom,sm6115-mdss.yaml | 5 ++++-
arch/arm64/boot/dts/qcom/sm6115.dtsi | 3 ++-
2 files changed, 6 insertions(+), 2 deletions(-)
base-commit: d053e38e614fb2e383b298ce8fc308a780d7f209
--
2.39.5
next reply other threads:[~2026-10-24 14:28 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-24 14:27 Michael McAllister [this message]
2026-10-24 14:27 ` [PATCH 1/2] dt-bindings: display: msm: sm6115-mdss: Add missing AHB clock Michael McAllister
2026-10-24 14:27 ` [PATCH 2/2] arm64: dts: qcom: sm6115: Add missing MDSS " Michael McAllister
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