From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756068AbdETNc4 (ORCPT ); Sat, 20 May 2017 09:32:56 -0400 Received: from mail-wr0-f196.google.com ([209.85.128.196]:35593 "EHLO mail-wr0-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752024AbdETNcy (ORCPT ); Sat, 20 May 2017 09:32:54 -0400 From: Cosar Dindar To: robh+dt@kernel.org Cc: mark.rutland@arm.com, linux@armlinux.org.uk, mcoquelin.stm32@gmail.com, alexandre.torgue@st.com, fabien.dessenne@st.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Cosar Dindar Subject: [PATCH v2 3/5] ARM: dts: stm32: enable CRC32 on stm32429-disco board Date: Sat, 20 May 2017 16:32:41 +0300 Message-Id: X-Mailer: git-send-email 2.7.4 In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Enable the CRC32 crypto on stm32429-disco board. Signed-off-by: Cosar Dindar --- arch/arm/boot/dts/stm32f429-disco.dts | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/boot/dts/stm32f429-disco.dts b/arch/arm/boot/dts/stm32f429-disco.dts index 191fa50..ae47cde 100644 --- a/arch/arm/boot/dts/stm32f429-disco.dts +++ b/arch/arm/boot/dts/stm32f429-disco.dts @@ -102,6 +102,10 @@ clock-frequency = <8000000>; }; +&crc { + status = "okay"; +}; + &rtc { assigned-clocks = <&rcc 1 CLK_RTC>; assigned-clock-parents = <&rcc 1 CLK_LSI>; -- 2.7.4