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Hopper/Blackwell+ have a larger width, so do an >> early read of boot42, in order to pick the correct value. >> >> Cc: Gary Guo >> Signed-off-by: John Hubbard >> --- >> drivers/gpu/nova-core/driver.rs | 33 ++++++++++++++-------------- >> drivers/gpu/nova-core/gpu.rs | 38 ++++++++++++++++++++++++--------- >> 2 files changed, 44 insertions(+), 27 deletions(-) >> >> diff --git a/drivers/gpu/nova-core/driver.rs b/drivers/gpu/nova-core/driver.rs >> index e39885c0d5ca..4ff07b643db6 100644 >> --- a/drivers/gpu/nova-core/driver.rs >> +++ b/drivers/gpu/nova-core/driver.rs >> @@ -5,7 +5,6 @@ >> device::Core, >> devres::Devres, >> dma::Device, >> - dma::DmaMask, >> pci, >> pci::{ >> Class, >> @@ -17,7 +16,10 @@ >> sync::Arc, // >> }; >> >> -use crate::gpu::Gpu; >> +use crate::gpu::{ >> + Gpu, >> + Spec, // >> +}; >> >> #[pin_data] >> pub(crate) struct NovaCore { >> @@ -29,14 +31,6 @@ pub(crate) struct NovaCore { >> >> const BAR0_SIZE: usize = SZ_16M; >> >> -// For now we only support Ampere which can use up to 47-bit DMA addresses. >> -// >> -// TODO: Add an abstraction for this to support newer GPUs which may support >> -// larger DMA addresses. Limiting these GPUs to smaller address widths won't >> -// have any adverse affects, unless installed on systems which require larger >> -// DMA addresses. These systems should be quite rare. >> -const GPU_DMA_BITS: u32 = 47; >> - >> pub(crate) type Bar0 = pci::Bar; >> >> kernel::pci_device_table!( >> @@ -75,18 +69,23 @@ fn probe(pdev: &pci::Device, _info: &Self::IdInfo) -> impl PinInit> pdev.enable_device_mem()?; >> pdev.set_master(); >> >> - // SAFETY: No concurrent DMA allocations or mappings can be made because >> - // the device is still being probed and therefore isn't being used by >> - // other threads of execution. >> - unsafe { pdev.dma_set_mask_and_coherent(DmaMask::new::())? }; >> - >> - let bar = Arc::pin_init( > > Spurious rename. Reverted. > >> + let devres_bar = Arc::pin_init( >> pdev.iomap_region_sized::(0, c"nova-core/bar0"), >> GFP_KERNEL, >> )?; >> >> + // Read the GPU spec early to determine the correct DMA address width. > > Hm.. we should move the dma_set_mask_and_coherent() call into Gpu::new(), so all > GPU specific initialization remains in the constructor of Gpu. Makes sense, done. > >> + // Hopper/Blackwell+ support 52-bit DMA addresses, earlier architectures use 47-bit. > > I'd move this down to the dma_set_mask_and_coherent() call, or maybe just remove > it as well, since we have the very same comment for Architecture::dma_mask(). Done. > >> + let spec = Spec::new(pdev.as_ref(), devres_bar.access(pdev.as_ref())?)?; >> + dev_info!(pdev.as_ref(), "NVIDIA ({})\n", spec); > > This re-introduces pdev.as_ref(). Fixed. Very helpful, thanks! thanks, -- John Hubbard > >> + >> + // SAFETY: No concurrent DMA allocations or mappings can be made because >> + // the device is still being probed and therefore isn't being used by >> + // other threads of execution. >> + unsafe { pdev.dma_set_mask_and_coherent(spec.chipset().arch().dma_mask())? }; >> + >> Ok(try_pin_init!(Self { >> - gpu <- Gpu::new(pdev, bar.clone(), bar.access(pdev.as_ref())?), >> + gpu <- Gpu::new(pdev, devres_bar.clone(), devres_bar.access(pdev.as_ref())?, spec), >> _reg <- auxiliary::Registration::new( >> pdev.as_ref(), >> c"nova-drm",