Re: [PATCH] arm64: dts: qcom: ipq9574: Use assigned-clock-rates for QUP I2C core clks

[Devi Priya <quic_devipriy@quicinc.com>]

On 6/15/2023 2:21 PM, Konrad Dybcio wrote:
> On 15.06.2023 10:48, Devi Priya wrote:
>> Use assigned-clock-rates property for configuring the QUP I2C core clocks
>> to operate at nominal frequency.
>>
>> Signed-off-by: Devi Priya <quic_devipriy@quicinc.com>
>> ---
> There's probably some logic behind this, and it almost sounds like
> it'd be fitting to introduce an OPP table for I2C hosts, especially
> given the voltage requirements.
> 
> Konrad
The qup i2c core clocks are not scalable and operate at fixed frequency.
The assigned-clock-rates are used to configure the clock frequency
if it is not done by the bootloaders.

Thanks,
Devi Priya
>>   arch/arm64/boot/dts/qcom/ipq9574.dtsi | 8 ++++++++
>>   1 file changed, 8 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/ipq9574.dtsi b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
>> index 0baeb10bbdae..78bf7f9c455a 100644
>> --- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
>> @@ -361,6 +361,8 @@
>>   			clocks = <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>,
>>   				 <&gcc GCC_BLSP1_AHB_CLK>;
>>   			clock-names = "core", "iface";
>> +			assigned-clocks = <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>;
>> +			assigned-clock-rates = <50000000>;
>>   			dmas = <&blsp_dma 14>, <&blsp_dma 15>;
>>   			dma-names = "tx", "rx";
>>   			status = "disabled";
>> @@ -389,6 +391,8 @@
>>   			clocks = <&gcc GCC_BLSP1_QUP3_I2C_APPS_CLK>,
>>   				 <&gcc GCC_BLSP1_AHB_CLK>;
>>   			clock-names = "core", "iface";
>> +			assigned-clocks = <&gcc GCC_BLSP1_QUP3_I2C_APPS_CLK>;
>> +			assigned-clock-rates = <50000000>;
>>   			dmas = <&blsp_dma 16>, <&blsp_dma 17>;
>>   			dma-names = "tx", "rx";
>>   			status = "disabled";
>> @@ -417,6 +421,8 @@
>>   			clocks = <&gcc GCC_BLSP1_QUP4_I2C_APPS_CLK>,
>>   				 <&gcc GCC_BLSP1_AHB_CLK>;
>>   			clock-names = "core", "iface";
>> +			assigned-clocks = <&gcc GCC_BLSP1_QUP4_I2C_APPS_CLK>;
>> +			assigned-clock-rates = <50000000>;
>>   			dmas = <&blsp_dma 18>, <&blsp_dma 19>;
>>   			dma-names = "tx", "rx";
>>   			status = "disabled";
>> @@ -446,6 +452,8 @@
>>   			clocks = <&gcc GCC_BLSP1_QUP5_I2C_APPS_CLK>,
>>   				 <&gcc GCC_BLSP1_AHB_CLK>;
>>   			clock-names = "core", "iface";
>> +			assigned-clocks = <&gcc GCC_BLSP1_QUP5_I2C_APPS_CLK>;
>> +			assigned-clock-rates = <50000000>;
>>   			dmas = <&blsp_dma 20>, <&blsp_dma 21>;
>>   			dma-names = "tx", "rx";
>>   			status = "disabled";