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From: "Suthikulpanit, Suravee" <suravee.suthikulpanit@amd.com>
To: Maxim Levitsky <mlevitsk@redhat.com>,
	linux-kernel@vger.kernel.org, iommu@lists.linux.dev
Cc: joro@8bytes.org, seanjc@google.com, vasant.hegde@amd.com,
	jon.grimm@amd.com, santosh.shukla@amd.com,
	joao.m.martins@oracle.com, alejandro.j.jimenez@oracle.com,
	boris.ostrovsky@oracle.com
Subject: Re: [PATCH] iommu/amd: Do not flush IRTE when only updating isRun and destination fields
Date: Thu, 19 Oct 2023 16:11:43 +0700	[thread overview]
Message-ID: <d0731c73-b2bb-972f-a728-f63273c4d5ab@amd.com> (raw)
In-Reply-To: <44477b0b-af38-569e-95d9-e78c118c9d18@amd.com>

Maxim,

On 10/17/2023 10:36 PM, Suthikulpanit, Suravee wrote:
> 
> On 10/17/2023 9:51 PM, Maxim Levitsky wrote:
>> У вт, 2023-10-17 у 09:42 -0500, Suravee Suthikulpanit пише:
>>> According to the recent update in the AMD IOMMU spec [1], the IsRun and
>>> Destination fields of the Interrupt Remapping Table Entry (IRTE) are not
>>> cached by the IOMMU hardware.
>> Is that true for all AMD hardware that supports AVIC? E.g Zen1/Zen2 
>> hardware?
> 
> This is true for all AVIC/x2AVIC-capable IOMMU hardware in the past.
> 
>> Is there a chance that this will cause a similar errata to the is_running
>> errata that Zen2 cpus have?
> 
> Please let me check on this and get back.

Just to be sure, could you please tell me which errata number are you 
referring to here?

Thanks,
Suravee

  reply	other threads:[~2023-10-19  9:12 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-10-17 14:42 Suravee Suthikulpanit
2023-10-17 14:51 ` Maxim Levitsky
2023-10-17 15:36   ` Suthikulpanit, Suravee
2023-10-19  9:11     ` Suthikulpanit, Suravee [this message]
2023-10-19 13:32       ` Maxim Levitsky
2023-10-18  6:07 ` Vasant Hegde
2023-10-18 20:16 ` Alejandro Jimenez
2023-12-11 14:22 ` Joerg Roedel

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