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Tue, 13 Jan 2026 01:48:45 -0800 (PST) Message-ID: Subject: Re: [PATCH 3/3] iio: imu: st_lsm6dsx: add support for rotation sensor From: Francesco Lavra To: Jonathan Cameron Cc: Lorenzo Bianconi , David Lechner , Nuno =?ISO-8859-1?Q?S=E1?= , Andy Shevchenko , linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org Date: Tue, 13 Jan 2026 10:48:39 +0100 In-Reply-To: <20260111164651.56a0cf14@jic23-huawei> References: <20260109181528.154127-1-flavra@baylibre.com> <20260109181528.154127-4-flavra@baylibre.com> <20260111164651.56a0cf14@jic23-huawei> Organization: BayLibre Content-Type: multipart/signed; micalg="pgp-sha512"; protocol="application/pgp-signature"; boundary="=-I3U8fW5tAGE63wIAUdgu" User-Agent: Evolution 3.46.4-2 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 --=-I3U8fW5tAGE63wIAUdgu Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Sun, 2026-01-11 at 16:46 +0000, Jonathan Cameron wrote: > On Fri,=C2=A0 9 Jan 2026 19:15:28 +0100 > Francesco Lavra wrote: >=20 > > Some IMU chips in the LSM6DSX family have sensor fusion features that > > combine data from the accelerometer and gyroscope. One of these > > features > > generates rotation vector data and makes it available in the hardware > > FIFO as a quaternion (more specifically, the X, Y and Z components of > > the > > quaternion vector, expressed as 16-bit half-precision floating-point > > numbers). > >=20 > > Add support for a new sensor instance that allows receiving sensor > > fusion > > data, by defining a new struct st_lsm6dsx_sf_settings (which contains > > chip-specific details for the sensor fusion functionality), and adding > > this > > struct as a new field in struct st_lsm6dsx_settings. In > > st_lsm6dsx_core.c, > > populate this new struct for the LSM6DSV and LSM6DSV16X chips, and add > > the > > logic to initialize an additional IIO device if this struct is > > populated > > for the hardware type being probed. > > Note: a new IIO device is being defined (as opposed to adding channels > > to > > an existing device) because each of the existing devices handles data > > coming from a single sensor, while sensor fusion data comes from > > multiple > > sensors. > That doesn't really justify the extra IIO device.=C2=A0 We used to do thi= s > because the IIO buffers aren't tagged with channel info > (unlike say driver/input) and so if the data for different channels > /sub parts of the sensor can come out at different rates, we have to > split them up.=C2=A0 So real question here is what data rate is this gene= rated > at?=C2=A0 If it matches an existing sensor we should add the channel ther= e, > if not fine to have yet another IIO device. All this changes is > the explanation in this patch description. Code is fine. The data rate from the rotation sensor may not match the rate from any of the existing sensors. I changed the explanation in the patch description. > Note as an FYI, we now support multiple buffers per IIO device. I think > there are probably still some corners that need ironing out, but in > theory > that was to handle this sort of sensor in a single IIO device. >=20 > >=20 > > Tested on LSMDSV16X. > >=20 > > Signed-off-by: Francesco Lavra >=20 >=20 > > diff --git a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_fusion.c > > b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_fusion.c > > new file mode 100644 > > index 000000000000..7c78f14cbb91 > > --- /dev/null > > +++ b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_fusion.c > > @@ -0,0 +1,224 @@ > > +// SPDX-License-Identifier: GPL-2.0-only > > +/* > > + * STMicroelectronics st_lsm6dsx IMU sensor fusion > > + */ > > + > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > + > > +#include "st_lsm6dsx.h" >=20 > > +/** > > + * st_lsm6dsx_sf_set_page - Enable or disable access to sensor fusion > > + * configuration registers. > > + * @hw: Sensor hardware instance. > > + * @enable: True to enable access, false to disable access. > > + * > > + * The register page lock is acquired when enabling access, and > > released when > > + * disabling access. Therefore, a function call with @enable set to > > true must be > > + * followed by a call with @enable set to false (unless the first call > > returns > > + * an error value). > > + * > > + * Return: 0 on success, negative value on error. > > + */ > > +static int st_lsm6dsx_sf_set_page(struct st_lsm6dsx_hw *hw, bool > > enable) > > +{ >=20 > I'm curious what sparse thinks of this.=C2=A0 Try a make C=3D1 build. > I'd expect it to be fussy that it can't figure out the acquires and > releases. > Maybe it can see enough to figure it out.=C2=A0 If not you might need to = break > it into two functions so you can add the markings __acquires() etc >=20 > Personally I think I'd just take the page lock out of here and use > guard() in the > callers. Building with make C=3D1 doesn't generate any sparse warnings (sparse is no= t invoked for this source file). On the other hand, if I break this function into two functions with the __acquires() and __releases() annotations, sparse generates a "context imbalance - wrong count at exit" warning for both functions (and their callers). I ended up just taking the page lock out of here and using guard() in the callers. > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0const struct st_lsm6dsx_reg = *mux; > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0int err; > > + > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0mux =3D &hw->settings->sf_se= ttings.page_mux; >=20 > Just to check, can you use regmaps support for paging instead of doing > this by hand? > That would avoid future problems with enabling caching or similar No, the chip has multiple register sets with overlapping addresses, and struct regmap_range_cfg is not usable here. >=20 > > + > > +static > > IIO_DEV_ATTR_SAMP_FREQ_AVAIL(st_lsm6dsx_sf_sampling_freq_avail); > > +static struct attribute *st_lsm6dsx_sf_attributes[] =3D { > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0&iio_dev_attr_sampling_frequ= ency_available.dev_attr.attr, > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0NULL, >=20 > No comma as nothing should come after this.=C2=A0 Ideally would be replac= ed > with > code using the read_avail callback and appropriate bit set in the > info mask avail bitmaps. The read_avail callback would require available values to be in an int array, with one of the available IIO_VAL_* formats, but the driver uses a table (similarly to other parts of the existing code) where frequency values are expressed in mHz (which does not match any IIO_VAL_* format) and are interleaved with corresponding hardware register values. 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