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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-6005a6e63a0sm72049a12.39.2025.05.15.09.36.00 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 15 May 2025 09:36:01 -0700 (PDT) Message-ID: Date: Thu, 15 May 2025 18:35:59 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH RFT v2 13/15] soc: qcom: ubwc: Fix SM6125's ubwc_swizzle value To: Dmitry Baryshkov , Konrad Dybcio , Konrad Dybcio Cc: Bjorn Andersson , Rob Clark , Abhinav Kumar , Akhil P Oommen , Sean Paul , David Airlie , Simona Vetter , Marijn Suijten , linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org References: <20250514-topic-ubwc_central-v2-0-09ecbc0a05ce@oss.qualcomm.com> <20250514-topic-ubwc_central-v2-13-09ecbc0a05ce@oss.qualcomm.com> <9a05d545-1bf2-4f66-8838-b6969ba37baa@oss.qualcomm.com> <466148c9-2461-4140-9ba9-5a3427ec6461@oss.qualcomm.com> <4ec678b4-9e69-4ba0-a59d-f2e0948a73ce@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <4ec678b4-9e69-4ba0-a59d-f2e0948a73ce@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Proofpoint-ORIG-GUID: B3CQiDin_PDk9y8mNCMsY-5ypi8C5ncf X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNTE1MDE2NCBTYWx0ZWRfX6b7K+oBv9Uh4 b4sEmHjXuSSzZeLyHmhnPyjO46K+teYdmA6jYFMYbhS4LdJtRDK/Ig+jerDU8r5jefGByUDxcpG qajcWPbQ/Gkz7KL8QHfNE0I+mpMM+Zs+ltU5l0V8OKI7fH+gpc6QEj8pCCN6co39FVx5cPdbzTV Tl0EHSgynoWe1ZaQYtehkGqVdyI5yenqX/Ik5MZA0t1sxSGFoCtGpfxyoFh3bRn4/fOIl9MHoBk mZVXGz5jgdltylQDpZ653ySFPiGrAWhIGlxL0cq1q5XK08H1z+y13nlDgsYMdqUJSKcwLdcyblD WrrDabz0oWM50apwNh4fUkuqvT6aV2HijnKqNt7X2Ou5w2fvG4j7bZWPiiFiW8+Ia0W3LMtF0iU amJ8Mja0X6PiQ0/nqPHqkJ7DgztAjvvtxqpEEolc9PzFB00gah9zeEMxveqnEl3kijnU+MeS X-Authority-Analysis: v=2.4 cv=K7UiHzWI c=1 sm=1 tr=0 ts=682617f4 cx=c_pps a=7E5Bxpl4vBhpaufnMqZlrw==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=dt9VzEwgFbYA:10 a=EUspDBNiAAAA:8 a=_jjhv_60NFWZV4FgBwEA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=pJ04lnu7RYOZP9TFuWaZ:22 X-Proofpoint-GUID: B3CQiDin_PDk9y8mNCMsY-5ypi8C5ncf X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.0.736,FMLib:17.12.80.40 definitions=2025-05-15_07,2025-05-15_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 priorityscore=1501 mlxscore=0 suspectscore=0 malwarescore=0 phishscore=0 mlxlogscore=999 clxscore=1015 bulkscore=0 impostorscore=0 lowpriorityscore=0 spamscore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2505070000 definitions=main-2505150164 On 5/15/25 6:21 PM, Dmitry Baryshkov wrote: > On 15/05/2025 19:18, Konrad Dybcio wrote: >> On 5/14/25 10:33 PM, Dmitry Baryshkov wrote: >>> On 14/05/2025 23:05, Konrad Dybcio wrote: >>>> On 5/14/25 9:23 PM, Dmitry Baryshkov wrote: >>>>> On Wed, May 14, 2025 at 05:10:33PM +0200, Konrad Dybcio wrote: >>>>>> From: Konrad Dybcio >>>>>> >>>>>> The value of 7 (a.k.a. GENMASK(2, 0), a.k.a. disabling levels 1-3 of >>>>>> swizzling) is what we want on this platform (and others with a UBWC >>>>>> 1.0 encoder). >>>>>> >>>>>> Fix it to make mesa happy (the hardware doesn't care about the 2 higher >>>>>> bits, as they weren't consumed on this platform). >>>>>> >>>>>> Signed-off-by: Konrad Dybcio >>>>>> --- >>>>>>    drivers/soc/qcom/ubwc_config.c | 2 +- >>>>>>    1 file changed, 1 insertion(+), 1 deletion(-) >>>>>> >>>>>> diff --git a/drivers/soc/qcom/ubwc_config.c b/drivers/soc/qcom/ubwc_config.c >>>>>> index 9caecd071035ccb03f14464e9b7129ba34a7f862..96b94cf01218cce2dacdba22c7573ba6148fcdd1 100644 >>>>>> --- a/drivers/soc/qcom/ubwc_config.c >>>>>> +++ b/drivers/soc/qcom/ubwc_config.c >>>>>> @@ -103,7 +103,7 @@ static const struct qcom_ubwc_cfg_data sm6115_data = { >>>>>>    static const struct qcom_ubwc_cfg_data sm6125_data = { >>>>>>        .ubwc_enc_version = UBWC_1_0, >>>>>>        .ubwc_dec_version = UBWC_3_0, >>>>>> -    .ubwc_swizzle = 1, >>>>>> +    .ubwc_swizzle = 7, >>>>>>        .highest_bank_bit = 14, >>>>>>    }; >>>>> >>>>> Add a comment and squash into the patch 1. >>>> >>>> I don't think that's a good idea, plus this series should be merged >>>> together anyway >>> >>> Well... Granted Rob's comment, I really think the patches should be reordered a bit: >>> >>> - MDSS: offset HBB by 13 (patch 2) >>> - switch drm/msm/mdss and display to common DB (patches 1+3 squashed) >>> - get a handle (patch 4) >>> - resolve / simplify (patches 5-10, not squashed) >>> - fix sm6125 (patch 13) >>> - WARN_ON (swizzle != swizzle) or (HBB != HBB) >>> - switch to common R/O config, keeping WARN_ON for the calculated values (with the hope to drop them after testing) >> >> Does this bring any functional benefit? This series is unfun to remix > > I know the pain. > > The functional benefit is to have the WARN_ON and side-by-side comparison of common_ubwc_config vs computed ubwc_config for HBB and swizzle. HBB I agree, since we'll be outsourcing it to yet another driver, swizzle should be good enough (tm) - I scanned through the values in the driver and couldn't find anything wrong just by eye I realize this sounds funny, but all in all I don't think it's worth the effort just for that one Konrad