Re: [PATCH v2 5/6] arm64: tegra: Enable native timers on Tegra194

[Jon Hunter <jonathanh@nvidia.com>]

On 29/06/2022 19:29, Kartik wrote:
> From: Thierry Reding <treding@nvidia.com>
> 
> The native timers IP block found on NVIDIA Tegra SoCs implements a
> watchdog timer that can be used to recover from system hangs. Add and
> enable the device tree node on Tegra194.
> 
> Signed-off-by: Thierry Reding <treding@nvidia.com>
> Signed-off-by: Kartik <kkartik@nvidia.com>
> ---
>   arch/arm64/boot/dts/nvidia/tegra194.dtsi | 16 ++++++++++++++++
>   1 file changed, 16 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
> index 9566c6388ed9..4b37aec69448 100644
> --- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi
> +++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
> @@ -698,6 +698,22 @@
>   			};
>   		};
>   
> +		timer@3010000 {
> +			compatible = "nvidia,tegra186-timer";
> +			reg = <0x03010000 0x000e0000>;
> +			interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
> +			status = "okay";
> +		};
> +
>   		uarta: serial@3100000 {
>   			compatible = "nvidia,tegra194-uart", "nvidia,tegra20-uart";
>   			reg = <0x03100000 0x40>;


Reviewed-by: Jon Hunter <jonathanh@nvidia.com>

Thanks!
Jon

-- 
nvpublic