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(p200300EA8F296000F4A01B382FAF56E9.dip0.t-ipconnect.de. [2003:ea:8f29:6000:f4a0:1b38:2faf:56e9]) by smtp.googlemail.com with ESMTPSA id o16sm35397700wrs.44.2020.03.25.08.24.06 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 25 Mar 2020 08:24:06 -0700 (PDT) Subject: Re: [PATCH 1/2] net: phy: micrel.c: add rgmii interface delay possibility to ksz9131 To: Philippe Schenker , andrew@lunn.ch, f.fainelli@gmail.com, linux@armlinux.org.uk, netdev@vger.kernel.org, robh+dt@kernel.org, devicetree@vger.kernel.org, shawnguo@kernel.org, mark.rutland@arm.com Cc: o.rempel@pengutronix.de, linux-kernel@vger.kernel.org, silvan.murer@gmail.com, s.hauer@pengutronix.de, a.fatoum@pengutronix.de, "David S. Miller" References: <20200325150329.228329-1-philippe.schenker@toradex.com> From: Heiner Kallweit Message-ID: Date: Wed, 25 Mar 2020 16:24:00 +0100 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:68.0) Gecko/20100101 Thunderbird/68.6.0 MIME-Version: 1.0 In-Reply-To: <20200325150329.228329-1-philippe.schenker@toradex.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 25.03.2020 16:03, Philippe Schenker wrote: > The KSZ9131 provides DLL controlled delays on RXC and TXC lines. This > patch makes use of those delays. The information which delays should > be enabled or disabled comes from the interface names, documented in > ethernet-controller.yaml: > > rgmii: Disable RXC and TXC delays > rgmii-id: Enable RXC and TXC delays > rgmii-txid: Enable only TXC delay, disable RXC delay > rgmii-rxid: Enable onlx RXC delay, disable TXC delay > > Signed-off-by: Philippe Schenker > --- > > drivers/net/phy/micrel.c | 45 ++++++++++++++++++++++++++++++++++++++++ > 1 file changed, 45 insertions(+) > > diff --git a/drivers/net/phy/micrel.c b/drivers/net/phy/micrel.c > index 63dedec0433d..d3ad09774847 100644 > --- a/drivers/net/phy/micrel.c > +++ b/drivers/net/phy/micrel.c > @@ -704,6 +704,48 @@ static int ksz9131_of_load_skew_values(struct phy_device *phydev, > return phy_write_mmd(phydev, 2, reg, newval); > } > > +/* MMD Address 0x2 */ > +#define KSZ9131RN_RXC_DLL_CTRL 76 > +#define KSZ9131RN_TXC_DLL_CTRL 77 > +#define KSZ9131RN_DLL_CTRL_BYPASS BIT_MASK(12) > +#define KSZ9131RN_DLL_ENABLE_DELAY 0 > +#define KSZ9131RN_DLL_DISABLE_DELAY BIT(12) > + > +static int ksz9131_config_rgmii_delay(struct phy_device *phydev) > +{ > + int ret; > + u16 rxcdll_val, txcdll_val; > + Reverse xmas tree order please. > + switch (phydev->interface) { > + case PHY_INTERFACE_MODE_RGMII: > + rxcdll_val = KSZ9131RN_DLL_DISABLE_DELAY; > + txcdll_val = KSZ9131RN_DLL_DISABLE_DELAY; > + break; > + case PHY_INTERFACE_MODE_RGMII_ID: > + rxcdll_val = KSZ9131RN_DLL_ENABLE_DELAY; > + txcdll_val = KSZ9131RN_DLL_ENABLE_DELAY; > + break; > + case PHY_INTERFACE_MODE_RGMII_RXID: > + rxcdll_val = KSZ9131RN_DLL_ENABLE_DELAY; > + txcdll_val = KSZ9131RN_DLL_DISABLE_DELAY; > + break; > + case PHY_INTERFACE_MODE_RGMII_TXID: > + rxcdll_val = KSZ9131RN_DLL_DISABLE_DELAY; > + txcdll_val = KSZ9131RN_DLL_ENABLE_DELAY; > + break; > + default: > + return 0; > + } > + > + ret = phy_modify_mmd_changed(phydev, 2, KSZ9131RN_RXC_DLL_CTRL, > + KSZ9131RN_DLL_CTRL_BYPASS, rxcdll_val); > + if (ret < 0) > + return ret; > + > + return phy_modify_mmd_changed(phydev, 2, KSZ9131RN_TXC_DLL_CTRL, > + KSZ9131RN_DLL_CTRL_BYPASS, txcdll_val); phy_modify_mmd_changed() returns 1 if the register value was changed, and that's not what you want here. Simply use phy_modify_mmd() in both occurrences. And your function has a return value, but it's not used by the caller. > +} > + > static int ksz9131_config_init(struct phy_device *phydev) > { > const struct device *dev = &phydev->mdio.dev; > @@ -730,6 +772,9 @@ static int ksz9131_config_init(struct phy_device *phydev) > if (!of_node) > return 0; > > + if (phy_interface_is_rgmii(phydev)) > + ksz9131_config_rgmii_delay(phydev); > + > ret = ksz9131_of_load_skew_values(phydev, of_node, > MII_KSZ9031RN_CLK_PAD_SKEW, 5, > clk_skews, 2); >