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charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-GUID: 399NgTsaUv-xMqR00c7v5gY6TNLlN0dp X-Proofpoint-ORIG-GUID: 399NgTsaUv-xMqR00c7v5gY6TNLlN0dp X-Authority-Analysis: v=2.4 cv=NofcssdJ c=1 sm=1 tr=0 ts=69cae3ed cx=c_pps a=IZJwPbhc+fLeJZngyXXI0A==:117 a=j4ogTh8yFefVWWEFDRgCtg==:17 a=IkcTkHD0fZMA:10 a=Yq5XynenixoA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=gowsoOTTUOVcmtlkKump:22 a=gMX6-vXHZE0qzWHLqhUA:9 a=QEXdDO2ut3YA:10 a=uG9DUKGECoFWVXl0Dc02:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMzMwMDE3NyBTYWx0ZWRfX87B7F54Vbln0 JsGdtE0G/jpoh7u1jRHrbwrcEQC2T+YSyrG/zJM82JWTVy9LZoaEPH0cLY9bE/TpOlC2KPK04Qa N+hjAHrZdxx9FDw57y/sAdVsJ96lG8NM1nHBvvLc1dK2FQRaOfDCgBt8Us8m0AZ9vAS55m0CXN6 GXLr3O8t3eWNyoxEnDMbeaAkRuG4ouJ1fY2JhGPf4hCFzl9Z703UmyxB5l/VSNIG4TeBrfwRUbP r2unk9MHqgRgpzSYjBtcMqD4BUPPxTDEJMyrxXmUI4sJ6dkZdgPjoqjIxGCfjDuP2fCzktlc9ef BdoVe/ZKFpPjNjds0wVyupbG5mlDdJ6lGRUMjE3JmWJHK/rbaU6NzR42aD6GhzIqoZO33AWsuXD 5tP0lxUX6WHAkT06/NjjKJh8eA2WV2YtWPy70xS9LSGHo1bGTF+yvboSuaeVAkLGIma/anUF0St 5nvzkN1X7tvQUpxE4mA== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-03-30_01,2026-03-28_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 adultscore=0 bulkscore=0 spamscore=0 priorityscore=1501 clxscore=1015 lowpriorityscore=0 phishscore=0 malwarescore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2603050001 definitions=main-2603300177 On 3/27/2026 5:07 PM, Konrad Dybcio wrote: > On 3/27/26 1:13 AM, Akhil P Oommen wrote: >> GMU_ALWAYS_ON_COUNTER_* registers got moved in A8x, but currently, A6x >> register offsets are used in the submit traces instead of A8x offsets. >> To fix this, refactor a bit and use adreno_gpu->funcs->get_timestamp() >> everywhere. >> >> While we are at it, update a8xx_gmu_get_timestamp() to use the GMU AO >> counter. > > Which I assume does not need the GMU to be in any particular state, just > have its clocks enabled? On A750+, there is a cx timer calibration during gmu resume to match the GPU AO counters with the CPU counter. That should be complete before we read this. -Akhil. > > Konrad