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Wed, 30 Jul 2025 09:10:15 -0700 (PDT) X-Google-Smtp-Source: AGHT+IESpaWOxmNYWoJxFhgXCazhVQZS2S0Iu1Mkn/tVp0EPP8Wf9SOkPH5bbEOsVSgOrIyQZIT8Lg== X-Received: by 2002:a17:903:2f87:b0:240:b630:e600 with SMTP id d9443c01a7336-240b630e7admr27941245ad.11.1753891815298; Wed, 30 Jul 2025 09:10:15 -0700 (PDT) Received: from [192.168.1.5] ([106.222.235.239]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2401a335b37sm77767365ad.124.2025.07.30.09.10.10 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 30 Jul 2025 09:10:14 -0700 (PDT) Message-ID: Date: Wed, 30 Jul 2025 21:40:08 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 2/3] arm64: dts: qcom: qcs615: Add clock nodes for multimedia clock To: Konrad Dybcio , Taniya Das , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "Rafael J. Wysocki" , Viresh Kumar , Manivannan Sadhasivam Cc: Ajit Pandey , Imran Shaik , Jagadeesh Kona , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org References: <20250702-qcs615-mm-cpu-dt-v4-v5-0-df24896cbb26@quicinc.com> <20250702-qcs615-mm-cpu-dt-v4-v5-2-df24896cbb26@quicinc.com> From: Akhil P Oommen Content-Language: en-US In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Authority-Analysis: v=2.4 cv=WvgrMcfv c=1 sm=1 tr=0 ts=688a43e8 cx=c_pps a=oF/VQ+ItUULfLr/lQ2/icg==:117 a=HRpvt/FSzHA3SJMKks594A==:17 a=IkcTkHD0fZMA:10 a=Wb1JkmetP80A:10 a=EUspDBNiAAAA:8 a=COk6AnOGAAAA:8 a=J94FwCPnZ0hQmDvvoVYA:9 a=QEXdDO2ut3YA:10 a=3WC7DwWrALyhR5TkjVHa:22 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-ORIG-GUID: 3CfN7pUmkL1Ip_H0aCdAidq_9LXQwtC9 X-Proofpoint-GUID: 3CfN7pUmkL1Ip_H0aCdAidq_9LXQwtC9 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNzMwMDExNyBTYWx0ZWRfX0Hhup3PlZIqI Mlju6aHc/nrZcZsrkwsw8w04GGJ/5Uk9JMihydcBnLemUTiV4tymiN7GG2NvyzPGNYtNjcUSX1k vNfag11RvXy0FwEqlHLF22FMVxtuDjG7ucfqtO3N4OSAfmrodMw3UJ6F4mJRAh8D5T/6yv1Bak+ KtPly0dLrBLheX8g384MRGE5Q/ycBGGjuehUzMbIorG8gGUfLyQXkiv+w227wHUm4i3x3HEZtSE PsTESWJjGfTyACpVBIYeC+vFMUc2m2qWeaSoIxfS4zs2ctfcId83/QjNShnBnLFRFamlOFG8IeV aFVI1BpkpcVABh/SnbZQAsQR5498SYtDxNT91/O2xjCpmBdfWhQ9MNPjjKy4XvfX2ZRpl6qdwJd jclu2JpeYDti1CGTG34xyQeUfJYYO/vz7HoSUclnKaqfxAG5GVYUmwtoNILzZMCgLHyd9sGx X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-07-30_05,2025-07-30_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 bulkscore=0 clxscore=1015 suspectscore=0 lowpriorityscore=0 spamscore=0 mlxscore=0 impostorscore=0 adultscore=0 malwarescore=0 priorityscore=1501 mlxlogscore=990 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2505280000 definitions=main-2507300117 On 7/30/2025 7:07 PM, Konrad Dybcio wrote: > On 7/2/25 11:13 AM, Taniya Das wrote: >> Add support for video, camera, display and gpu clock controller nodes >> for QCS615 platform. >> >> Reviewed-by: Konrad Dybcio >> Signed-off-by: Taniya Das >> --- > > Bjorn mentioned offline that these controllers should > probably have power-domains attached to them (perhaps bar > GPU_CC, that's under discussion..) QCS615 has an rgmu which doesn't manage gpucc. So this is a different case from the other discussion. Are we talking about scaling mx and cx rail while setting clk rate? Downstream clk driver does that on behalf of the clients. I suppose you are not talking about that here. -Akhil. > > Konrad >