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The Ethernet port and the IPQ5018's own 2.4 GHz radio are left out until the GMAC and the WCSS remoteproc have bindings; the LED controller and the board MCU on the I2C bus have none. The QCN9074s carry the calibration variants their board data is looked up by. The SoC dtsi gains the pcie1_port0 label, as pcie0 has, for the 6 GHz radio below that root port. The vendor QSEE reserves 4 MiB, twice the SoC default. Assisted-by: LLM Signed-off-by: Andrei-Alexandru Bleortu --- arch/arm64/boot/dts/qcom/Makefile | 1 + .../dts/qcom/ipq5018-ubnt-u6-enterprise.dts | 235 ++++++++++++++++++ arch/arm64/boot/dts/qcom/ipq5018.dtsi | 2 +- 3 files changed, 237 insertions(+), 1 deletion(-) create mode 100644 arch/arm64/boot/dts/qcom/ipq5018-ubnt-u6-enterprise.dts diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile index 88230c4e00..aca7d8e415 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -32,6 +32,7 @@ dtb-$(CONFIG_ARCH_QCOM) += hamoa-lenovo-ideacentre-mini-01q8x10.dtb dtb-$(CONFIG_ARCH_QCOM) += hawi-mtp.dtb dtb-$(CONFIG_ARCH_QCOM) += ipq5018-rdp432-c2.dtb dtb-$(CONFIG_ARCH_QCOM) += ipq5018-tplink-archer-ax55-v1.dtb +dtb-$(CONFIG_ARCH_QCOM) += ipq5018-ubnt-u6-enterprise.dtb dtb-$(CONFIG_ARCH_QCOM) += ipq5210-rdp504.dtb dtb-$(CONFIG_ARCH_QCOM) += ipq5332-rdp441.dtb dtb-$(CONFIG_ARCH_QCOM) += ipq5332-rdp442.dtb diff --git a/arch/arm64/boot/dts/qcom/ipq5018-ubnt-u6-enterprise.dts b/arch/arm64/boot/dts/qcom/ipq5018-ubnt-u6-enterprise.dts new file mode 100644 index 0000000000..131e89fe61 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/ipq5018-ubnt-u6-enterprise.dts @@ -0,0 +1,235 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +/dts-v1/; + +#include +#include + +#include "ipq5018.dtsi" + +/ { + model = "Ubiquiti UniFi U6 Enterprise"; + compatible = "ubnt,u6-enterprise", "qcom,ipq5018"; + + aliases { + serial0 = &blsp1_uart1; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + keys { + compatible = "gpio-keys"; + pinctrl-0 = <&button_pins>; + pinctrl-names = "default"; + + button-reset { + label = "Reset"; + gpios = <&tlmm 24 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; +}; + +&blsp1_i2c3 { + pinctrl-0 = <&i2c_pins>; + pinctrl-names = "default"; + + status = "okay"; + + accelerometer@18 { + compatible = "st,lis2dh12-accel"; + reg = <0x18>; + }; +}; + +&blsp1_spi1 { + pinctrl-0 = <&spi_0_pins>; + pinctrl-names = "default"; + + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <50000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "0:sbl1"; + reg = <0x000000 0x030000>; + read-only; + }; + + partition@30000 { + label = "0:mibib"; + reg = <0x030000 0x010000>; + read-only; + }; + + partition@40000 { + label = "0:bootconfig"; + reg = <0x040000 0x010000>; + read-only; + }; + + partition@50000 { + label = "0:qsee"; + reg = <0x050000 0x0a0000>; + read-only; + }; + + partition@f0000 { + label = "0:devcfg"; + reg = <0x0f0000 0x010000>; + read-only; + }; + + partition@100000 { + label = "0:cdt"; + reg = <0x100000 0x010000>; + read-only; + }; + + partition@110000 { + label = "0:appsblenv"; + reg = <0x110000 0x010000>; + }; + + partition@120000 { + label = "0:appsbl"; + reg = <0x120000 0x0a0000>; + read-only; + }; + + partition@1c0000 { + label = "0:art"; + reg = <0x1c0000 0x070000>; + read-only; + }; + + partition@230000 { + label = "eeprom"; + reg = <0x230000 0x010000>; + read-only; + }; + }; + }; +}; + +/* The bootloader muxes the console pins; GPIO33/34 are I2C on this board. */ +&blsp1_uart1 { + status = "okay"; +}; + +&pcie0 { + status = "okay"; +}; + +&pcie0_phy { + status = "okay"; +}; + +&pcie0_port0 { + reset-gpios = <&tlmm 15 GPIO_ACTIVE_LOW>; + + wifi@0,0 { + compatible = "pci17cb,1104"; + reg = <0x10000 0x0 0x0 0x0 0x0>; + qcom,calibration-variant = "Ubiquiti-U6-Enterprise-5G"; + }; +}; + +&pcie1 { + status = "okay"; +}; + +&pcie1_phy { + status = "okay"; +}; + +&pcie1_port0 { + reset-gpios = <&tlmm 18 GPIO_ACTIVE_LOW>; + + wifi@0,0 { + compatible = "pci17cb,1104"; + reg = <0x10000 0x0 0x0 0x0 0x0>; + qcom,calibration-variant = "Ubiquiti-U6-Enterprise-6G"; + }; +}; + +&sdhc_1 { + pinctrl-0 = <&emmc_pins>; + pinctrl-names = "default"; + bus-width = <4>; + non-removable; + no-sd; + no-sdio; + + status = "okay"; +}; + +&sleep_clk { + clock-frequency = <32000>; +}; + +&tlmm { + button_pins: button-state { + pins = "gpio24"; + function = "gpio"; + drive-strength = <8>; + bias-pull-up; + }; + + emmc_pins: emmc-state { + clk-pins { + pins = "gpio9"; + function = "sdc1_clk"; + drive-strength = <8>; + bias-disable; + }; + + cmd-pins { + pins = "gpio8"; + function = "sdc1_cmd"; + drive-strength = <8>; + bias-pull-up; + }; + + data-pins { + pins = "gpio4", "gpio5", "gpio6", "gpio7"; + function = "sdc1_data"; + drive-strength = <8>; + bias-disable; + }; + }; + + i2c_pins: i2c-state { + pins = "gpio33", "gpio34"; + function = "blsp2_i2c0"; + drive-strength = <8>; + bias-disable; + }; + + spi_0_pins: spi-0-state { + pins = "gpio10", "gpio11", "gpio12", "gpio13"; + function = "blsp0_spi"; + drive-strength = <8>; + bias-disable; + }; +}; + +/* The vendor QSEE uses 4 MiB, twice the SoC default. */ +&tz_region { + reg = <0x0 0x4ac00000 0x0 0x400000>; +}; + +&xo_board_clk { + clock-div = <4>; + clock-mult = <1>; +}; diff --git a/arch/arm64/boot/dts/qcom/ipq5018.dtsi b/arch/arm64/boot/dts/qcom/ipq5018.dtsi index dde5435f69..ee8c0fc03f 100644 --- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi @@ -837,7 +837,7 @@ pcie1: pcie@80000000 { status = "disabled"; - pcie@0 { + pcie1_port0: pcie@0 { device_type = "pci"; reg = <0x0 0x0 0x0 0x0 0x0>; bus-range = <0x01 0xff>; -- 2.47.3