From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933068AbdC3HcS (ORCPT ); Thu, 30 Mar 2017 03:32:18 -0400 Received: from mx07-00178001.pphosted.com ([62.209.51.94]:47998 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932650AbdC3HcR (ORCPT ); Thu, 30 Mar 2017 03:32:17 -0400 Subject: Re: [PATCH 0/2] mtd: spi-nor: add stm32 qspi driver To: Cyrille Pitchen , Cyrille Pitchen , Marek Vasut References: <1490619296-8168-1-git-send-email-ludovic.Barre@st.com> <5224f3cd-a128-9e72-c0c8-62a137ceeb79@wedev4u.fr> CC: Boris Brezillon , Alexandre Torgue , , Richard Weinberger , , Rob Herring , , Brian Norris , David Woodhouse From: Ludovic BARRE Message-ID: Date: Thu, 30 Mar 2017 09:31:15 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.7.0 MIME-Version: 1.0 In-Reply-To: <5224f3cd-a128-9e72-c0c8-62a137ceeb79@wedev4u.fr> Content-Type: text/plain; charset="windows-1252"; format=flowed Content-Transfer-Encoding: 8bit X-Originating-IP: [10.75.127.47] X-ClientProxiedBy: SFHDAG8NODE2.st.com (10.75.127.23) To SFHDAG6NODE1.st.com (10.75.127.16) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:,, definitions=2017-03-30_05:,, signatures=0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org hi Cyrille I see your patch series [PATCH v5 0/6] mtd: spi-nor: parse SFDP tables to setup (Q)SPI memories No problem, I rebase my V2 onto your patch BR Ludo On 03/29/2017 06:51 PM, Cyrille Pitchen wrote: > Hi Ludovic, > > Le 27/03/2017 à 14:54, Ludovic Barre a écrit : >> From: Ludovic Barre >> >> This patch set adds a SPI-NOR driver for stm32 QSPI controller. >> It is a specialized SPI interface for serial Flash devices. >> It supports 1 or 2 Flash device with single, dual and quad SPI Flash memories. >> >> It can operate in any of the following modes: >> -indirect mode: all the operations are performed using the quadspi >> registers >> -read memory-mapped mode: the external Flash memory is mapped to the >> microcontroller address space and is seen by the system as if it was >> an internal memory >> >> Ludovic Barre (2): >> dt-bindings: Document the STM32 QSPI bindings >> mtd: spi-nor: add driver for STM32 quad spi flash controller >> >> .../devicetree/bindings/mtd/stm32-quadspi.txt | 45 ++ >> drivers/mtd/spi-nor/Kconfig | 7 + >> drivers/mtd/spi-nor/Makefile | 1 + >> drivers/mtd/spi-nor/stm32-quadspi.c | 679 +++++++++++++++++++++ >> 4 files changed, 732 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/mtd/stm32-quadspi.txt >> create mode 100644 drivers/mtd/spi-nor/stm32-quadspi.c >> > Just a small word to warn you that I'm likely to ask you to rebase this > series onto the patch "mtd: spi-nor: introduce more SPI protocols and > the Dual Transfer Mode". Indeed, I need to synchronize with Marek first > but I plan to merge this patch within few days. > > > Best regards, > > Cyrille