From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,MAILING_LIST_MULTI, NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id F2A5FC433E0 for ; Wed, 30 Dec 2020 11:13:38 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B58A822209 for ; Wed, 30 Dec 2020 11:13:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726533AbgL3LNX (ORCPT ); Wed, 30 Dec 2020 06:13:23 -0500 Received: from szxga04-in.huawei.com ([45.249.212.190]:9704 "EHLO szxga04-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726348AbgL3LNW (ORCPT ); Wed, 30 Dec 2020 06:13:22 -0500 Received: from DGGEMS411-HUB.china.huawei.com (unknown [172.30.72.58]) by szxga04-in.huawei.com (SkyGuard) with ESMTP id 4D5TBH3WQ0zkxJl; Wed, 30 Dec 2020 19:11:35 +0800 (CST) Received: from [127.0.0.1] (10.174.177.9) by DGGEMS411-HUB.china.huawei.com (10.3.19.211) with Microsoft SMTP Server id 14.3.498.0; Wed, 30 Dec 2020 19:12:36 +0800 Subject: Re: [PATCH v2 1/1] ARM: LPAE: use phys_addr_t instead of unsigned long in outercache hooks To: Russell King - ARM Linux admin CC: Greg Kroah-Hartman , Will Deacon , Jason Cooper , Haojian Zhuang , Arnd Bergmann , linux-arm-kernel , linux-kernel References: <20201230082805.1428-1-thunder.leizhen@huawei.com> <20201230082805.1428-2-thunder.leizhen@huawei.com> <20201230095424.GO1551@shell.armlinux.org.uk> From: "Leizhen (ThunderTown)" Message-ID: Date: Wed, 30 Dec 2020 19:12:35 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:60.0) Gecko/20100101 Thunderbird/60.7.0 MIME-Version: 1.0 In-Reply-To: <20201230095424.GO1551@shell.armlinux.org.uk> Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 7bit X-Originating-IP: [10.174.177.9] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2020/12/30 17:54, Russell King - ARM Linux admin wrote: > On Wed, Dec 30, 2020 at 04:28:05PM +0800, Zhen Lei wrote: >> The outercache of some Hisilicon SOCs support physical addresses wider >> than 32-bits. The unsigned long datatype is not sufficient for mapping >> physical addresses >= 4GB. The commit ad6b9c9d78b9 ("ARM: 6671/1: LPAE: >> use phys_addr_t instead of unsigned long in outercache functions") has >> already modified the outercache functions. But the parameters of the >> outercache hooks are not changed. This patch use phys_addr_t instead of >> unsigned long in outercache hooks: inv_range, clean_range, flush_range. >> >> To ensure the outercache that does not support LPAE works properly, do >> cast phys_addr_t to unsigned long by adding a group of temporary >> variables. For example: >> -static void l2c220_inv_range(unsigned long start, unsigned long end) >> +static void l2c220_inv_range(phys_addr_t pa_start, phys_addr_t pa_end) >> { >> + unsigned long start = pa_start; >> + unsigned long end = pa_end; >> >> Note that the outercache functions have been doing this cast before this >> patch. So now, the cast is just moved into the outercache hook functions. >> >> No functional change. >> >> Signed-off-by: Zhen Lei > > This is fine, but there really needs to be a patch that makes use of > this change before we accept it into mainline kernels. > OK, I will send the outcache driver of Hisilicon after New Year's Day.