Re: [PATCH] spi: spi-geni-qcom: Correct CS_TOGGLE bit in SPI_TRANS_CFG

[Konrad Dybcio <konrad.dybcio@linaro.org>]

On 1.05.2023 10:05, Vijaya Krishna Nivarthi wrote:
> On 4/25/2023 7:15 PM, Konrad Dybcio wrote:
>>
>> On 4/25/23 09:42, Vijaya Krishna Nivarthi wrote:
>>> The CS_TOGGLE bit when set is supposed to instruct FW to
>>> toggle CS line between words. The driver with intent of
>>> disabling this behaviour has been unsetting BIT(0). This has
>>> not caused any trouble so far because the original BIT(1)
>>> is untouched and BIT(0) likely wasn't being used.
>>>
>>> Correct this to prevent a potential future bug.
>>>
>>> Signed-off-by: Vijaya Krishna Nivarthi <quic_vnivarth@quicinc.com>
>>> ---
>>
>> Has this always been the case, or did the switch to BIT(1)
>> only occur on some recent platforms?
> 
> 
> Thank you very much for the review..
> 
> This has always been the case.
> 
> With intent of disabling CS_TOGGLE, currently, the driver is unsetting BIT(0), though it should have been BIT(1).
> 
> Yet no problem was encountered because
> 
> a) BIT(0) seems to be an unused bit
> 
> b) BIT(1) is probably already unset because its untouched
> 
> Further more, as Doug pointed we are mostly using GPIO for CS.
> 
> 
> Testing with the change has not caused any regressions.
Okay, with no deeper knowledge of the topic best I can give you is:

Acked-by: Konrad Dybcio <konrad.dybcio@linaro.org>


Konrad
> 
> 
> Thank you,
> 
> Vijay/
> 
> 
> 
>>
>> Konrad
>>
>>>   drivers/spi/spi-geni-qcom.c | 2 +-
>>>   1 file changed, 1 insertion(+), 1 deletion(-)
>>>
>>> diff --git a/drivers/spi/spi-geni-qcom.c b/drivers/spi/spi-geni-qcom.c
>>> index ba7be50..8a7d1c2 100644
>>> --- a/drivers/spi/spi-geni-qcom.c
>>> +++ b/drivers/spi/spi-geni-qcom.c
>>> @@ -35,7 +35,7 @@
>>>   #define CS_DEMUX_OUTPUT_SEL    GENMASK(3, 0)
>>>     #define SE_SPI_TRANS_CFG    0x25c
>>> -#define CS_TOGGLE        BIT(0)
>>> +#define CS_TOGGLE        BIT(1)
>>>     #define SE_SPI_WORD_LEN        0x268
>>>   #define WORD_LEN_MSK        GENMASK(9, 0)