From: Mathias Nyman <mathias.nyman@intel.com>
To: Kai Heng Feng <kai.heng.feng@canonical.com>,
"Singh, Sandeep" <sandeep.singh@amd.com>
Cc: "gregkh@linuxfoundation.org" <gregkh@linuxfoundation.org>,
"linux-usb@vger.kernel.org" <linux-usb@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"S-k, Shyam-sundar" <Shyam-sundar.S-k@amd.com>,
"Shah, Nehal-bakulchandra" <Nehal-bakulchandra.Shah@amd.com>
Subject: Re: [PATCH v3] xhci: workaround CSS timeout on AMD SNPS 3.0 xHC
Date: Tue, 27 Nov 2018 13:48:02 +0200 [thread overview]
Message-ID: <d2583bdb-c63c-6d62-6b36-2f21d558bbbb@intel.com> (raw)
In-Reply-To: <4B40F321-BE33-4D36-BE1A-59139D9AA711@canonical.com>
On 27.11.2018 09:44, Kai Heng Feng wrote:
>
>
>> On Nov 24, 2018, at 00:24, Singh, Sandeep <sandeep.singh@amd.com> wrote:
>>
>> From: Sandeep Singh <sandeep.singh@amd.com>
>>
>> Occasionally AMD SNPS 3.0 xHC does not respond to
>> CSS when set, also it does not flag anything on SRE and HCE
>> to point the internal xHC errors on USBSTS register. This stalls
>> the entire system wide suspend and there is no point in stalling
>> just because of xHC CSS is not responding.
>>
>> To work around this problem, if the xHC does not flag
>> anything on SRE and HCE, we can skip the CSS
>> timeout and allow the system to continue the suspend. Once the
>> system resume happens we can internally reset the controller
>> using XHCI_RESET_ON_RESUME quirk
>>
>> Signed-off-by: Shyam Sundar S K <Shyam-sundar.S-k@amd.com>
>> Signed-off-by: Sandeep Singh <Sandeep.Singh@amd.com>
>> cc: Nehal Shah <Nehal-bakulchandra.Shah@amd.com>
>
> Tested-by: Kai-Heng Feng <kai.heng.feng@canonical.com>
Thanks, applying
-Mathias
prev parent reply other threads:[~2018-11-27 11:44 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-11-23 16:24 Singh, Sandeep
2018-11-27 7:44 ` Kai Heng Feng
2018-11-27 11:48 ` Mathias Nyman [this message]
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