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AJvYcCUwJ+BtviwobW6IfwKXlApDSUfT2tAdIjLmtitfLTzEdxnfoVg1mQxI0YvluiocnNBbYXjxna2g8cWfkppzixVVrsbdA+G/6iHTKk6b X-Gm-Message-State: AOJu0Yx4kFc2yFQRIw+Bfg15VHP+k/oOTpXiPhC4uGORWHM3WI5H3Q58 p/ldHA80yFscYmisOF/vs7ycGfXoX+NRge3AxIEw9+hjw/kv8H0dzwCYmH4Lqi4= X-Google-Smtp-Source: AGHT+IFkKshORuwAmsZnn8xxofp9a6fcJtaxQLVFg8WAgCFiqFkB3N2AvjI0Q+cJPc7zo1sInebzog== X-Received: by 2002:adf:ed52:0:b0:367:96a0:c4b7 with SMTP id ffacd0b85a97d-3679dd73e11mr2952668f8f.62.1720170503963; Fri, 05 Jul 2024 02:08:23 -0700 (PDT) Received: from [192.168.1.20] ([178.197.219.137]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-36788e37b53sm8830126f8f.45.2024.07.05.02.08.20 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 05 Jul 2024 02:08:23 -0700 (PDT) Message-ID: Date: Fri, 5 Jul 2024 11:08:18 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 4/4] arm64: dts: qcom: Add CCU and ETR nodes for SA8775p To: Jie Gan , Mathieu Poirier , Suzuki K Poulose , Alexander Shishkin , Mike Leach , Rob Herring , Krzysztof Kozlowski , James Clark Cc: Jinlong Mao , Leo Yan , coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Tingwei Zhang , Yuanfang Zhang , Tao Zhang , Trilok Soni , Song Chai , linux-arm-msm@vger.kernel.org References: <20240705090049.1656986-1-quic_jiegan@quicinc.com> <20240705090049.1656986-5-quic_jiegan@quicinc.com> From: Krzysztof Kozlowski Content-Language: en-US Autocrypt: addr=krzysztof.kozlowski@linaro.org; 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charset=UTF-8 Content-Transfer-Encoding: 7bit On 05/07/2024 11:00, Jie Gan wrote: > Add CCU and ETR device tree nodes to enable related functions. > > Signed-off-by: Jie Gan > --- > arch/arm64/boot/dts/qcom/sa8775p.dtsi | 163 ++++++++++++++++++++++++++ > 1 file changed, 163 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi > index 23f1b2e5e624..ef4df5e59ab3 100644 > --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi > +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi > @@ -1664,6 +1664,38 @@ ice: crypto@1d88000 { > clocks = <&gcc GCC_UFS_PHY_ICE_CORE_CLK>; > }; > > + ccu@4001000 { > + compatible = "qcom,coresight-ccu"; > + reg = <0x0 0x4001000 0x0 0x1000>; > + reg-names = "ccu-base"; NAK, not tested. Follow your own internal guidelines - they are precise in what testing you must peform. Best regards, Krzysztof