From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754667AbdBVJg3 (ORCPT ); Wed, 22 Feb 2017 04:36:29 -0500 Received: from mail-lf0-f54.google.com ([209.85.215.54]:34077 "EHLO mail-lf0-f54.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754530AbdBVJgY (ORCPT ); Wed, 22 Feb 2017 04:36:24 -0500 Subject: Re: [PATCH v3 7/8] arm64: dts: mt8173: move clock from phy node into port nodes To: Chunfeng Yun , Kishon Vijay Abraham I References: <1487753705-6745-1-git-send-email-chunfeng.yun@mediatek.com> <1487753705-6745-7-git-send-email-chunfeng.yun@mediatek.com> Cc: Matthias Brugger , Felipe Balbi , Rob Herring , Mark Rutland , Ian Campbell , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-usb@vger.kernel.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org From: Sergei Shtylyov Message-ID: Date: Wed, 22 Feb 2017 12:36:21 +0300 User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:45.0) Gecko/20100101 Thunderbird/45.7.1 MIME-Version: 1.0 In-Reply-To: <1487753705-6745-7-git-send-email-chunfeng.yun@mediatek.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2/22/2017 11:55 AM, Chunfeng Yun wrote: > there is a reference clock for each port, HighSpeed port is 48M, > and SuperSpeed port is 26M which usually comes from 26M oscillator > directly, but some SoCs is not. it is flexible to move it into port ... but on some SoCs does not? > node. > > Signed-off-by: Chunfeng Yun [...] MBR, Sergei