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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-af91a21c10asm277886566b.116.2025.08.01.04.54.24 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 01 Aug 2025 04:54:26 -0700 (PDT) Message-ID: Date: Fri, 1 Aug 2025 13:54:23 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 3/7] clk: qcom: Add TCSR clock driver for Glymur To: Abel Vesa , Taniya Das Cc: kernel@oss.qualcomm.com, Pankaj Patil , Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Taniya Das , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20250729-glymur-gcc-tcsrcc-rpmhcc-v3-0-227cfe5c8ef4@oss.qualcomm.com> <20250729-glymur-gcc-tcsrcc-rpmhcc-v3-3-227cfe5c8ef4@oss.qualcomm.com> <784545d0-2173-4a8b-9d5d-bee11226351e@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-ORIG-GUID: O7qihFxg2eZA46kO-rts4zg_SfGh-r8U X-Proofpoint-GUID: O7qihFxg2eZA46kO-rts4zg_SfGh-r8U X-Authority-Analysis: v=2.4 cv=f+RIBPyM c=1 sm=1 tr=0 ts=688caaf4 cx=c_pps a=EVbN6Ke/fEF3bsl7X48z0g==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=2OwXVqhp2XgA:10 a=EUspDBNiAAAA:8 a=pJtBvqx0UPjT60PkLbkA:9 a=QEXdDO2ut3YA:10 a=a_PwQJl-kcHnX1M80qC6:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwODAxMDA4NyBTYWx0ZWRfXyRu/0sPhcdNZ VZYwSz1IGBZBz7aH2XCFWwfH0VyOgDTrhDYEq2eHvjHLI7ojw7UtmXwDDGfvj6kqNVMmynnEJeK K/XhHw3roQaCyokNuZVDL3Jcc6eq/h1UPhVftvaRjiHRLznz5ZeDOETWYUHvJofjlZ6XYwTLNR+ 30aMUWmVBCEbRYp1gvcvruTOMvzIucd7bfVBhTrDHU9F0+D3xsREPTRqywDde5pgZhvuF+fNiNL c78K9rUDepensBOBkSbYzli9TkAZNs7rzGgncWLqIg8Tp/UCmiF999iisYQPAIQua3nFa3nsJyr dnkucoctPz+pxfyivbJ7ZNQlR3DAC9ZoHwaohnE45FAMp8Dc/IIrmq0/VfjTzs20tjFRM49e42E xdCBTT3N1tRad4Lz2w5AlwiLkiSIw658e+4tGNUcJxZmkMlcXWIpdV09jvg7frtM2D+GQh+I X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-08-01_03,2025-07-31_03,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 impostorscore=0 malwarescore=0 mlxlogscore=999 mlxscore=0 lowpriorityscore=0 suspectscore=0 phishscore=0 priorityscore=1501 bulkscore=0 adultscore=0 clxscore=1015 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2505280000 definitions=main-2508010087 On 8/1/25 7:31 AM, Abel Vesa wrote: > On 25-08-01 10:02:15, Taniya Das wrote: >> >> >> On 7/30/2025 4:55 PM, Abel Vesa wrote: >>> On 25-07-29 11:12:37, Taniya Das wrote: >>>> Add a clock driver for the TCSR clock controller found on Glymur, which >>>> provides refclks for PCIE, USB, and UFS. >>>> >>>> Signed-off-by: Taniya Das >>>> --- >>>> drivers/clk/qcom/Kconfig | 8 ++ >>>> drivers/clk/qcom/Makefile | 1 + >>>> drivers/clk/qcom/tcsrcc-glymur.c | 257 +++++++++++++++++++++++++++++++++++++++ >>>> 3 files changed, 266 insertions(+) >>>> >>> >>> [...] >>> >>>> + >>>> +static struct clk_branch tcsr_edp_clkref_en = { >>>> + .halt_reg = 0x1c, >>>> + .halt_check = BRANCH_HALT_DELAY, >>>> + .clkr = { >>>> + .enable_reg = 0x1c, >>>> + .enable_mask = BIT(0), >>>> + .hw.init = &(const struct clk_init_data) { >>>> + .name = "tcsr_edp_clkref_en", >>>> + .ops = &clk_branch2_ops, >>> >>> As discussed off-list, these clocks need to have the bi_tcxo as parent. >>> >>> Otherwise, as far as the CCF is concerned these clocks will have rate 0, >>> which is obviously not the case. >>> >>> Bringing this here since there is a disconnect between X Elite and >>> Glymur w.r.t this now. >> >> >> The ref clocks are not required to be have a parent of bi_tcxo as these >> ideally can be left enabled(as a subsystem requirement) even if HLOS >> (APSS) goes to suspend. With the bi_tcxo parent the ARC vote from >> HLOS/APSS will not allow APSS to collapse. > > Is there a scenario where the APSS is collapsed and still the ref clock > needs to stay enabled ? Sorry, this doesn't make sense to me. MDSS is capable of displaying things from a buffer when the CPU is off, AFAICU We can do CXO_AO instead to have it auto-collapse if it's just Linux requesting it to stay on, I think. Konrad