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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-65fabbd98bcsm4567887a12.0.2026.03.03.04.10.43 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 03 Mar 2026 04:10:45 -0800 (PST) Message-ID: Date: Tue, 3 Mar 2026 13:10:43 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] clk: qcom: dispcc-sc8280xp: remove CLK_SET_RATE_PARENT from byte_div_clk_src dividers To: Pengyu Luo , Bjorn Andersson , Michael Turquette , Stephen Boyd , Konrad Dybcio , Dmitry Baryshkov Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, White Lewis References: <20260303115550.9279-1-mitltlatltl@gmail.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20260303115550.9279-1-mitltlatltl@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-GUID: hLhkTy-pQm9z5l2BNNSzwQyKANr-Pbfv X-Authority-Analysis: v=2.4 cv=GIUF0+NK c=1 sm=1 tr=0 ts=69a6cfc7 cx=c_pps a=oc9J++0uMp73DTRD5QyR2A==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=Yq5XynenixoA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yOCtJkima9RkubShWh1s:22 a=pGLkceISAAAA:8 a=EUspDBNiAAAA:8 a=r64ZnLUNze7Q9b7ZCxUA:9 a=QEXdDO2ut3YA:10 a=iYH6xdkBrDN1Jqds4HTS:22 X-Proofpoint-ORIG-GUID: hLhkTy-pQm9z5l2BNNSzwQyKANr-Pbfv X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMzAzMDA5NSBTYWx0ZWRfX8TiJpLQUGSuY AYoMEBk8VsQOK61fCtSvTUjSpVc0EI6jg3xcowkrZMWxXLZ5uQS7HrlCF1DALaPpxlDBP8NzPt0 1I8txXa4H/CVw1UrACslJF9+KiGrhYT52cYXXzV8WDnOInTyf+7kjOcCPxIgqbwlRpoI13uhBkn FezSV6uP4CB82LwNUvS6jxKGW4xAJ7evO8NDBSD/HzCJXpXQStpz1m3z1uOgg4xkPPQGcnMTnp2 xaGCvgidV8WZfK2v6mz14bdP2wTVGVDwO0x9IxtwDOgBpr2Zoj4GlhIFT7W5akFXAVKe8yTeQjG 2fWclj5UCm/jGq26u+qjdwGhM1BTuE8wG1LF7OsaO3H6O5NrjaFNg3+kgQ0jVmluxrpG6IK3Wis jdiUdAP4QWafobKzl/cmAhsGSK5D9Ay1HQfNafWVpI7N8XX7ADBcupu6GzOtjpbnac7J99NOTgh M+37rfn8nCa+ELhkUSg== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-03-02_05,2026-03-03_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 impostorscore=0 priorityscore=1501 clxscore=1015 malwarescore=0 suspectscore=0 spamscore=0 phishscore=0 lowpriorityscore=0 adultscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2602130000 definitions=main-2603030095 On 3/3/26 12:55 PM, Pengyu Luo wrote: > From: White Lewis > > The four byte_div_clk_src dividers (disp{0,1}_cc_mdss_byte{0,1}_div_clk_src) > had CLK_SET_RATE_PARENT set. When the DSI driver calls clk_set_rate() on > byte_intf_clk, the rate-change propagates through the divider up to the > parent PLL (byte_clk_src), halving the byte clock rate. > > A simiar issue had been also encountered on SM8750. > b8501febdc51 ("clk: qcom: dispcc-sm8750: Drop incorrect CLK_SET_RATE_PARENT on byte intf parent"). > > Likewise, remove CLK_SET_RATE_PARENT from all four byte divider clocks > so that clk_set_rate() on the divider adjusts only the divider ratio, > leaving the parent PLL untouched. > > Fixes: 4a66e76fdb6d ("clk: qcom: Add SC8280XP display clock controller") > Signed-off-by: White Lewis > [pengyu: reword] > Signed-off-by: Pengyu Luo > --- Looks like more platforms have this issue.. thanks for fixing this Reviewed-by: Konrad Dybcio Konrad