From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.1 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 21F36C43387 for ; Tue, 18 Dec 2018 10:12:20 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id DB4412184A for ; Tue, 18 Dec 2018 10:12:19 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="ZCTlYH1s" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726675AbeLRKMS (ORCPT ); Tue, 18 Dec 2018 05:12:18 -0500 Received: from mail-pf1-f194.google.com ([209.85.210.194]:46874 "EHLO mail-pf1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726498AbeLRKMQ (ORCPT ); Tue, 18 Dec 2018 05:12:16 -0500 Received: by mail-pf1-f194.google.com with SMTP id c73so7898464pfe.13; Tue, 18 Dec 2018 02:12:15 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=OyPcckJ9H9PrTKbckA2hoYoFgyfsOddw9oRRuNtLyW8=; b=ZCTlYH1ss+S1m+k+w6/x2ENkFmSnefUVv58lbNZQpzLyqcCLqLhZhaICUZhV637HjJ y2a4fxpp5niYNeo8IaKu9Xw0lPNDyM+nygig6ubkAc1lycdvyVu35NnOIinMInw547R9 3p24ua0Xmr+T2gkf/++Hu0OJ94pxhzW4GkVPyysQTF5tFzqSoY5XE1ZkUjFhJwkN4//u bGP8vCjJ5DI9HpVyZcgBTbh89pXhcKz+sZ27PmCKp/eEfyd+MjYsiDW65in/FMwMLlZn YSNBXfQkvVvAlQfFrRBQNhf+rDEDf7Ag/fSL4bIAf95Dk4GX8MFEMtWggfM53HJj6E7S zcqA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=OyPcckJ9H9PrTKbckA2hoYoFgyfsOddw9oRRuNtLyW8=; b=O/4Ffywwgo740aclf0LdX0GlisSJm1OQDEuHRruUvBfXnhRp0sn+tOvabdXLBadrUk GC1Uk/71/RS3w5ADPmJCPu5DXMVFp+8sOQeeQI2S/2E4vy7kvwv3j6eooncoRRyv3r6g 8aX2K8dGF0A5Bes7d3J9Agvg2WUT4OrhNS6j67M2o0iV3LQnakFxvMycr5oJVz2ColtO TieVKKotOjlhK0+24erBJ40TR2yxss2A9bnciII7fL7MyBBK3WV0OgbSVTdrLqmxJ5HC /g1Q1llIobbvIxtYN6Jg39li9YDPi8ZpsOpa6LMpTzZeo781So8CiAOZ1u6TWebdRyQo gt0w== X-Gm-Message-State: AA+aEWZWmSQ8ge+2laQNKHTpNL1M0wvdQOYz6Poc2JT86Gbc+QtYrRyP 9UUnkuHT916k6+a5/dgV0cM= X-Google-Smtp-Source: AFSGD/W1vfcVu/nOlvpukKbX5cQ+j/PQNytUizBELpoxW/wLnDO94gibWYT3zUOJfadsCoGMoaonKA== X-Received: by 2002:a62:1992:: with SMTP id 140mr2082156pfz.33.1545127935314; Tue, 18 Dec 2018 02:12:15 -0800 (PST) Received: from localhost.localdomain ([2001:268:c0a5:b5e9:3c79:e26e:bf45:b953]) by smtp.gmail.com with ESMTPSA id x27sm31442450pfe.178.2018.12.18.02.12.12 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 18 Dec 2018 02:12:14 -0800 (PST) From: William Breathitt Gray To: linus.walleij@linaro.org Cc: akpm@linux-foundation.org, linux-gpio@vger.kernel.org, linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, andriy.shevchenko@linux.intel.com, linux@rasmusvillemoes.dk, William Breathitt Gray Subject: [PATCH v5 3/8] gpio: 104-dio-48e: Utilize for_each_set_clump8 macro Date: Tue, 18 Dec 2018 19:12:45 +0900 Message-Id: X-Mailer: git-send-email 2.20.1 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Replace verbose implementation in get_multiple/set_multiple callbacks with for_each_set_clump8 macro to simplify code and improve clarity. Signed-off-by: William Breathitt Gray --- drivers/gpio/gpio-104-dio-48e.c | 71 ++++++++++----------------------- 1 file changed, 20 insertions(+), 51 deletions(-) diff --git a/drivers/gpio/gpio-104-dio-48e.c b/drivers/gpio/gpio-104-dio-48e.c index 92c8f944bf64..b68c39f8aa23 100644 --- a/drivers/gpio/gpio-104-dio-48e.c +++ b/drivers/gpio/gpio-104-dio-48e.c @@ -183,46 +183,25 @@ static int dio48e_gpio_get(struct gpio_chip *chip, unsigned offset) return !!(port_state & mask); } +static const size_t ports[] = { 0, 1, 2, 4, 5, 6 }; + static int dio48e_gpio_get_multiple(struct gpio_chip *chip, unsigned long *mask, unsigned long *bits) { struct dio48e_gpio *const dio48egpio = gpiochip_get_data(chip); - size_t i; - static const size_t ports[] = { 0, 1, 2, 4, 5, 6 }; - const unsigned int gpio_reg_size = 8; - unsigned int bits_offset; - size_t word_index; - unsigned int word_offset; - unsigned long word_mask; - const unsigned long port_mask = GENMASK(gpio_reg_size - 1, 0); + unsigned int offset; + unsigned long gpio_mask; + unsigned int port_addr; unsigned long port_state; /* clear bits array to a clean slate */ bitmap_zero(bits, chip->ngpio); - /* get bits are evaluated a gpio port register at a time */ - for (i = 0; i < ARRAY_SIZE(ports); i++) { - /* gpio offset in bits array */ - bits_offset = i * gpio_reg_size; - - /* word index for bits array */ - word_index = BIT_WORD(bits_offset); - - /* gpio offset within current word of bits array */ - word_offset = bits_offset % BITS_PER_LONG; - - /* mask of get bits for current gpio within current word */ - word_mask = mask[word_index] & (port_mask << word_offset); - if (!word_mask) { - /* no get bits in this port so skip to next one */ - continue; - } - - /* read bits from current gpio port */ - port_state = inb(dio48egpio->base + ports[i]); + for_each_set_clump8(offset, gpio_mask, mask, ARRAY_SIZE(ports) * 8) { + port_addr = dio48egpio->base + ports[offset / 8]; + port_state = inb(port_addr) & gpio_mask; - /* store acquired bits at respective bits array offset */ - bits[word_index] |= (port_state << word_offset) & word_mask; + bitmap_set_value8(bits, &port_state, offset); } return 0; @@ -252,37 +231,27 @@ static void dio48e_gpio_set_multiple(struct gpio_chip *chip, unsigned long *mask, unsigned long *bits) { struct dio48e_gpio *const dio48egpio = gpiochip_get_data(chip); - unsigned int i; - const unsigned int gpio_reg_size = 8; - unsigned int port; - unsigned int out_port; + unsigned int offset; + unsigned long gpio_mask; + size_t index; + unsigned int port_addr; unsigned int bitmask; unsigned long flags; - /* set bits are evaluated a gpio register size at a time */ - for (i = 0; i < chip->ngpio; i += gpio_reg_size) { - /* no more set bits in this mask word; skip to the next word */ - if (!mask[BIT_WORD(i)]) { - i = (BIT_WORD(i) + 1) * BITS_PER_LONG - gpio_reg_size; - continue; - } + for_each_set_clump8(offset, gpio_mask, mask, ARRAY_SIZE(ports) * 8) { + index = offset / 8; + port_addr = dio48egpio->base + ports[index]; - port = i / gpio_reg_size; - out_port = (port > 2) ? port + 1 : port; - bitmask = mask[BIT_WORD(i)] & bits[BIT_WORD(i)]; + bitmask = bitmap_get_value8(bits, offset) & gpio_mask; raw_spin_lock_irqsave(&dio48egpio->lock, flags); /* update output state data and set device gpio register */ - dio48egpio->out_state[port] &= ~mask[BIT_WORD(i)]; - dio48egpio->out_state[port] |= bitmask; - outb(dio48egpio->out_state[port], dio48egpio->base + out_port); + dio48egpio->out_state[index] &= ~gpio_mask; + dio48egpio->out_state[index] |= bitmask; + outb(dio48egpio->out_state[index], port_addr); raw_spin_unlock_irqrestore(&dio48egpio->lock, flags); - - /* prepare for next gpio register set */ - mask[BIT_WORD(i)] >>= gpio_reg_size; - bits[BIT_WORD(i)] >>= gpio_reg_size; } } -- 2.20.1