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[103.229.16.4]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c74029fa6eesm5535805a12.20.2026.03.17.00.06.15 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 17 Mar 2026 00:06:19 -0700 (PDT) Message-ID: Date: Tue, 17 Mar 2026 15:06:11 +0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v11 1/7] dt-bindings: arm: Add support for Qualcomm TGU trace To: Jie Gan , andersson@kernel.org, alexander.shishkin@linux.intel.com, mike.leach@linaro.org, konrad.dybcio@oss.qualcomm.com, suzuki.poulose@arm.com, james.clark@arm.com, krzk+dt@kernel.org, conor+dt@kernel.org Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, coresight@lists.linaro.org, devicetree@vger.kernel.org, gregkh@linuxfoundation.org, Rob Herring References: <20260226020454.3210149-1-songwei.chai@oss.qualcomm.com> <20260226020454.3210149-2-songwei.chai@oss.qualcomm.com> <32309e19-e193-4f56-80c4-39b028f05876@oss.qualcomm.com> Content-Language: en-US From: "Songwei.Chai" In-Reply-To: <32309e19-e193-4f56-80c4-39b028f05876@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Proofpoint-GUID: uYP1sshRU6Jxn0ElolLJ3TyrJgTVBTiQ X-Authority-Analysis: v=2.4 cv=CKInnBrD c=1 sm=1 tr=0 ts=69b8fd6d cx=c_pps a=0uOsjrqzRL749jD1oC5vDA==:117 a=nuhDOHQX5FNHPW3J6Bj6AA==:17 a=IkcTkHD0fZMA:10 a=Yq5XynenixoA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=ZpdpYltYx_vBUK5n70dp:22 a=gEfo2CItAAAA:8 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=mofWGhzUb814t78398AA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=mQ_c8vxmzFEMiUWkPHU9:22 a=sptkURWiP4Gy88Gu7hUp:22 X-Proofpoint-ORIG-GUID: uYP1sshRU6Jxn0ElolLJ3TyrJgTVBTiQ X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMzE3MDA2MSBTYWx0ZWRfX0BtT7PkPGrmr ABLB8yJemCKbZ4YmHYHfQXEyBX7Eu3sgx6EZh6uSfRMu0NxBXjwbdXitUJo27bBSS1uynuckYEm N9NUdWVd3wFR2dZl6HereezsorGpa45QTkArFVodAMfhYiNuDY/mE1SL+LzLvYvc2wGWyToRSTp 2KW3SSNd4ZY1u/59iYnrBaNnJs7QvZjfXXnQI7TzZcw3/3KYFGj8Yt5dBCzqwSdHjkcoi5mrwX0 xOI9Iv8U/lkMjJSchV2+6cCsNW+5jkc8ovVmqBWSd8LPFtYtvDtBp1gATHWhLx3HXV2MMwONfct zy8CvEm6DEQ5rqg+IXFgLGf5KR5wWTmyVIffguP6WMjG8H2F2h1ZNaLfynd9ObPlLX1obWBDKxu dO7u4yoabHndH0DzqtkBxCATGyY+oFnwzCxG/S475RjX8CmANdC0grrgKkM3cLxXphrn9arTO03 ZF8L+rAOcSjjG+CjFVg== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-03-17_01,2026-03-16_06,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 lowpriorityscore=0 phishscore=0 priorityscore=1501 bulkscore=0 adultscore=0 impostorscore=0 suspectscore=0 spamscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2603050001 definitions=main-2603170061 On 2/26/2026 2:07 PM, Jie Gan wrote: > > > On 2/26/2026 10:04 AM, Songwei Chai wrote: >> The Trigger Generation Unit (TGU) is designed to detect patterns or >> sequences within a specific region of the System on Chip (SoC). Once >> configured and activated, it monitors sense inputs and can detect a >> pre-programmed state or sequence across clock cycles, subsequently >> producing a trigger. >> >>     TGU configuration space >>          offset table >>   x-------------------------x >>   |                         | >>   |                         | >>   |                         |                           Step >> configuration >>   |                         |                             space layout >>   |   coresight management  | x-------------x >>   |        registers        |                     |---> |             | >>   |                         |                     |     | reserve    | >>   |                         |                     | |             | >>   |-------------------------|                     | |-------------| >>   |                         |                     |     | priority[3] | >>   |         step[7]         |<--                  | |-------------| >>   |-------------------------|   |                 |     | priority[2] | >>   |                         |   |                 | |-------------| >>   |           ...           |   |Steps region     |     | priority[1] | >>   |                         |   |                 | |-------------| >>   |-------------------------|   |                 |     | priority[0] | >>   |                         |<--                  | |-------------| >>   |         step[0]         |--------------------> |             | >>   |-------------------------|                           | condition  | >>   |                         | |             | >>   |     control and status  | x-------------x >>   |           space         | |             | >>   x-------------------------x |Timer/Counter| >> |             | >>                                x-------------x >> TGU Configuration in Hardware >> >> The TGU provides a step region for user configuration, similar >> to a flow chart. Each step region consists of three register clusters: >> >> 1.Priority Region: Sets the required signals with priority. >> 2.Condition Region: Defines specific requirements (e.g., signal A >> reaches three times) and the subsequent action once the requirement is >> met. >> 3.Timer/Counter (Optional): Provides timing or counting functionality. >> >> Add a new tgu.yaml file to describe the bindings required to >> define the TGU in the device trees. >> >> Reviewed-by: Rob Herring (Arm) >> Signed-off-by: Songwei Chai >> --- >>   .../devicetree/bindings/arm/qcom,tgu.yaml     | 92 +++++++++++++++++++ >>   1 file changed, 92 insertions(+) >>   create mode 100644 Documentation/devicetree/bindings/arm/qcom,tgu.yaml >> >> diff --git a/Documentation/devicetree/bindings/arm/qcom,tgu.yaml >> b/Documentation/devicetree/bindings/arm/qcom,tgu.yaml >> new file mode 100644 >> index 000000000000..5b6a58ebe691 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/arm/qcom,tgu.yaml >> @@ -0,0 +1,92 @@ >> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause >> +# Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights >> reserved. >> +%YAML 1.2 >> +--- >> +$id: http://devicetree.org/schemas/arm/qcom,tgu.yaml# >> +$schema: http://devicetree.org/meta-schemas/core.yaml# >> + >> +title: Trigger Generation Unit - TGU >> + >> +description: | >> +  The Trigger Generation Unit (TGU) is a Data Engine which can be >> utilized >> +  to sense a plurality of signals and create a trigger into the CTI or >> +  generate interrupts to processors. The TGU is like the trigger >> circuit >> +  of a Logic Analyzer. The corresponding trigger logic can be >> realized by >> +  configuring the conditions for each step after sensing the signal. >> +  Once setup and enabled, it will observe sense inputs and based upon >> +  the activity of those inputs, even over clock cycles, may detect a >> +  preprogrammed state/sequence and then produce a trigger or interrupt. >> + >> +  The primary use case of the TGU is to detect patterns or sequences >> on a >> +  given set of signals within some region to identify the issue in time >> +  once there is abnormal behavior in the subsystem. >> + >> +maintainers: >> +  - Mao Jinlong >> +  - Songwei Chai >> + >> +# Need a custom select here or 'arm,primecell' will match on lots of >> nodes >> +select: >> +  properties: >> +    compatible: >> +      contains: >> +        enum: >> +          - qcom,tgu >> +  required: >> +    - compatible >> + >> +properties: >> +  compatible: >> +    items: >> +      - const: qcom,tgu >> +      - const: arm,primecell >> + >> +  reg: >> +    maxItems: 1 >> + >> +  clocks: >> +    maxItems: 1 >> + >> +  clock-names: >> +    items: >> +      - const: apb_pclk >> + >> +  in-ports: >> +    $ref: /schemas/graph.yaml#/properties/ports >> +    additionalProperties: false >> + > > The TGU device is no longer a CoreSight device, so I think the > in-ports property is no longer needed. > > Thanks, > Jie > Thanks Jie, Your comment has been addressed and updated in V12. >> +    properties: >> +      port: >> +        description: >> +          The port mechanism here ensures the relationship between >> TGU and >> +          TPDM, as TPDM is one of the inputs for TGU. It will allow >> TGU to >> +          function as TPDM's helper and enable TGU when the connected >> +          TPDM is enabled. >> +        $ref: /schemas/graph.yaml#/properties/port >> + >> +required: >> +  - compatible >> +  - reg >> +  - clocks >> +  - clock-names >> + >> +additionalProperties: false >> + >> +examples: >> +  - | >> +    tgu@10b0e000 { >> +        compatible = "qcom,tgu", "arm,primecell"; >> +        reg = <0x10b0e000 0x1000>; >> + >> +        clocks = <&aoss_qmp>; >> +        clock-names = "apb_pclk"; >> + >> +        in-ports { >> +            port { >> +                tgu_in_tpdm_swao: endpoint{ >> +                    remote-endpoint = <&tpdm_swao_out_tgu>; >> +                }; >> +            }; >> +        }; >> +    }; >> +... >