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From: Tomas Melin <tomas.melin@vaisala.com>
To: "T, Harini" <Harini.T@amd.com>,
	Alexandre Belloni <alexandre.belloni@bootlin.com>,
	"Simek, Michal" <michal.simek@amd.com>
Cc: "linux-rtc@vger.kernel.org" <linux-rtc@vger.kernel.org>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 1/4] rtc: zynqmp: correct frequency value
Date: Wed, 10 Dec 2025 14:29:42 +0200	[thread overview]
Message-ID: <d3087d78-31e6-4a29-8939-d6adae8a4307@vaisala.com> (raw)
In-Reply-To: <LV5PR12MB980479009955E816E72E6EA892A3A@LV5PR12MB9804.namprd12.prod.outlook.com>

Hi,

On 09/12/2025 18:51, T, Harini wrote:
> [Public]
> 
> Hi,
> 
>> -----Original Message-----
>> From: Tomas Melin <tomas.melin@vaisala.com>
>> Sent: Monday, December 1, 2025 6:20 PM
>> To: Alexandre Belloni <alexandre.belloni@bootlin.com>; Simek, Michal
>> <michal.simek@amd.com>
>> Cc: linux-rtc@vger.kernel.org; linux-arm-kernel@lists.infradead.org; linux-
>> kernel@vger.kernel.org; Tomas Melin <tomas.melin@vaisala.com>
>> Subject: [PATCH 1/4] rtc: zynqmp: correct frequency value
>>
>> Caution: This message originated from an External Source. Use proper
>> caution when opening attachments, clicking links, or responding.
>>
>>
>> Fix calibration value in case a clock reference is provided.
>> The actual calibration value written into register is
>> frequency - 1.
>>
>> Signed-off-by: Tomas Melin <tomas.melin@vaisala.com>
>> ---
>>  drivers/rtc/rtc-zynqmp.c | 3 +++
>>  1 file changed, 3 insertions(+)
>>
>> diff --git a/drivers/rtc/rtc-zynqmp.c b/drivers/rtc/rtc-zynqmp.c
>> index
>> 3baa2b481d9f2008750046005283b98a0d546c5c..856bc1678e7d31144f320ae
>> 9f75fc58c742a2a64 100644
>> --- a/drivers/rtc/rtc-zynqmp.c
>> +++ b/drivers/rtc/rtc-zynqmp.c
>> @@ -345,7 +345,10 @@ static int xlnx_rtc_probe(struct platform_device
>> *pdev)
>>                                            &xrtcdev->freq);
>>                 if (ret)
>>                         xrtcdev->freq = RTC_CALIB_DEF;
>> +       } else {
>> +               xrtcdev->freq--;
> If freq > 65536, the 16-bit register silently truncates.
> Please add some checks for above mentioned scenario.
That is indeed a scenario that is not accounted for in the current
driver. I can add a separate patch for that as part of this series.

Thanks,
Tomas


>>         }
>> +
>>         ret = readl(xrtcdev->reg_base + RTC_CALIB_RD);
>>         if (!ret)
>>                 writel(xrtcdev->freq, (xrtcdev->reg_base + RTC_CALIB_WR));
>>
>> --
>> 2.47.3
>>
> Thanks,
> Harini T


  reply	other threads:[~2025-12-10 12:31 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-12-01 12:50 [PATCH 0/4] rtc: zynqmp: fixes for read and set offset Tomas Melin
2025-12-01 12:50 ` [PATCH 1/4] rtc: zynqmp: correct frequency value Tomas Melin
2025-12-09 16:51   ` T, Harini
2025-12-10 12:29     ` Tomas Melin [this message]
2025-12-01 12:50 ` [PATCH 2/4] rtc: zynqmp: rework read_offset Tomas Melin
2025-12-09 17:28   ` T, Harini
2025-12-10 12:04     ` Tomas Melin
2025-12-17 18:14       ` T, Harini
2025-12-17 19:17         ` Alexandre Belloni
2025-12-01 12:50 ` [PATCH 3/4] rtc: zynqmp: rework set_offset Tomas Melin
2025-12-09 19:03   ` T, Harini
2025-12-10 12:18     ` Tomas Melin
2025-12-17 18:33       ` T, Harini
2025-12-01 12:50 ` [PATCH 4/4] rtc: zynqmp: use dynamic max and min offset ranges Tomas Melin
2025-12-09 19:28   ` T, Harini
2025-12-10 12:25     ` Tomas Melin
2025-12-17 19:03       ` T, Harini

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