Re: [PATCH v4 1/3] selftests/resctrl: Skip L3_CAT when no exclusive cache portion exists

[Reinette Chatre <reinette.chatre@intel.com>]

Hi Richard,

On 8/18/26 3:54 AM, Richard Cheng wrote:
> On Wed, Aug 12, 2026 at 10:22:03AM +0800, Reinette Chatre wrote:
>> Hi Richard,
>>
>> On 7/21/26 8:59 PM, Richard Cheng wrote:
>>> L3_CAT measures cache isolation, which requires at least one cache bit
>>> that is not shared with non-CPU agents, i.e. cbm_mask & ~shareable_bits
>>> must be non-zero. On MPAM, shareable_bits == cbm_mask is a legitimate
>>> state, so there are situations in which no bit can be reported as
>>> exclusive.
>>>
>>> Previously get_mask_no_shareable() was invoked inside cat_run_test()
>>> and silently returned -1, which surfaced as a test failure on arm64
>>> MPAM systems.
>>>
>>> Implement cat_feature_check() to perform the same check at feature-check
>>> time. It prints a diagnostic and returns false so the test case is
>>> skipped instead of failing.
>>>
>>> Tested-by: Chen Yu <yu.c.chen@intel.com>
>>> Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
>>> Signed-off-by: Richard Cheng <icheng@nvidia.com>
>>> ---
>>
>> This patch is unchanged from v3. My comments against v3 still apply:
>> https://lore.kernel.org/lkml/5d76e776-82d3-4f02-8384-a890349ae96c@intel.com/
>>
>> As noted there, this issue does not just impact aarch64. Could you please
>> split this patch from this series? When it is ready I would like to make a
>> request for its inclusion in the next cycle.
>>
>> Thank you.
>>
>> Reinette
> 
> Hi Reinette,
> 
> Thanks for your patient and review.
> 
> Just to confirm that I understand correctly before I send v5.
> 
> I plan to
> 1. Split this patch out of the arm64 series and send it as a standalone v5 patch
> 2. Keep the code change the same, and udpate the commit message to make it clear that having no exclusive cache portion causes
>    L3_CAT to fail, and simplify the desciprtion as you suggested
> 3. Change the in-code comment to platform-neutral wording

Sounds good, thank you.

> 
> About the editted commit message, I plan to write it like the following
> 
> """
> selftests/resctrl: Skip L3_CAT when no exclusive cache portion exists
> 
> L3_CAT measures cache isolation, which requires at least one cache bit

nit:
I do not see L3_CAT as measuring cache isolation. Instead, it requires
cache isolation to test whether cache allocation works.

How about something like (please feel free to adjust):
	L3_CAT requires an exclusive cache portion to test cache allocation.
	This means that there cannot be any overlap between the cache portion
	used by the test and the portions of cache other agents may allocate into.

	Some platforms legitimately report every cache portion as shareable,
	leaving no exclusive cache portion and causing L3_CAT to fail.

	Skip, rather than fail, ...

> that is not shared with non-CPU agents, i.e. cbm_mask & ~shareable_bits
> must be non-zero. Some platforms legitimately report every cache bit as
> shareable, leaving no exclusive cache portion and causing L3_CAT to fail.
> 
> Skip, rather than fail, the L3_CAT test when the platform has no
> exclusive cache portion that the test can use.
> """
> 
> Does this match what you imagined ?
This looks good to me. Thank you very much.

Please also consider the above feedback when adjusting the in-code comment.

Specifically, the original comment:
	/*
	 * The CAT isolation measurement needs a cache portion that no
	 * other agent shares. On MPAM the kernel may legitimately report
	 * all bits as shareable; skip the test if that is the case.
	 */
Could be something like:
	/*
	 * Test requires an exclusive cache portion. Some platforms may
	 * legitimately report all bits as shareable; skip the test if that
	 * is the case.
	 */

And the original message:
		ksft_print_msg("All %s bits are shareable; cannot measure CAT isolation\n",
			       test->resource);
Could be something like:
		ksft_print_msg("All %s bits are shareable; test requires an exclusive cache portion\n",
			       test->resource);

Reinette