From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AF1B9390C85 for ; Sun, 2 Aug 2026 16:15:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.10 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785687332; cv=none; b=DM56YK7u1Q6BN2OQaN5QlmtpgagMRi6gqTYUu7bNmlxWChJZmfNAErrVuamrqIhFEJnl+pgKQqkNrdlDKmkDw2Gu2UZD9JfGo1xWFtEP5iUjktA6Jtmjjh8ob19q8eKVLW4RhoLlfK4ClrvRXUNw2zkkXGvGQuRzBYCg2zN1xH8= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785687332; c=relaxed/simple; bh=qC2rlwAy1FhOZj9t6UXGQYkrW5V1n57FNVIFbJuEnt0=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=MSDsbBvmvHDgxTRT/gCIV2JnIF+zGAdR8p8x3VIPeiOZC+UM47yoGJsuFZxfHq07kdE6P0QstaJGy5Ge0mqHCBJ1QNsYY+xQhyIs2zlAWAuT3QIUQFi60fUGCaqMyzgmhwQCogwI8AOd3rjKIe5U0l39yd5AHyS7dHub/ES29GY= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=e/RjqM9S; arc=none smtp.client-ip=192.198.163.10 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="e/RjqM9S" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1785687330; x=1817223330; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=qC2rlwAy1FhOZj9t6UXGQYkrW5V1n57FNVIFbJuEnt0=; b=e/RjqM9S7W9otVYAmsJw9mDY/3mBh+kYgAmzEg3jkwUdCzc0OiDyqR+G mnNJg4OlxpCGVpUyHAJWKIlpRMgsqIcnP7hQbzLP86DiEtdkuqfv1ERNM Mfgzmff7IoT4JV1gJ0M0/5tRWAJovgR+Ozliro5qcTIcwXNFdKwguPC50 XBt6tdutfpSm9WCkxc8vAE50iSrRGAwrlvBYX8vY6RsHVdr2Zz//WsOUH 7Ce0WLHMVhlmUpazUc0wx5fQvilmMTpZz2rCeys1ME93GaighBTP9aqtO cv75TgYk9pIwsa+8fiBZnIiv17jTAHte7feYhtAwAbc/G+A+D6pjIs5sd g==; X-CSE-ConnectionGUID: vIgxh0O3Riyg7KHGxSEKtg== X-CSE-MsgGUID: TQXyO/oESCy9jbyRmpZr5g== X-IronPort-AV: E=McAfee;i="6800,10657,11863"; a="97612352" X-IronPort-AV: E=Sophos;i="6.25,200,1779174000"; d="scan'208";a="97612352" Received: from orviesa007.jf.intel.com ([10.64.159.147]) by fmvoesa104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Aug 2026 09:15:28 -0700 X-CSE-ConnectionGUID: aYkgXwnrRnC/rEfHkRdNuA== X-CSE-MsgGUID: QMAUWJG3QU6hvBrY05gvrQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.25,200,1779174000"; d="scan'208";a="261068697" Received: from chenyu-dev.sh.intel.com ([10.239.62.107]) by orviesa007.jf.intel.com with ESMTP; 02 Aug 2026 09:15:25 -0700 From: Chen Yu To: Reinette Chatre , Tony Luck Cc: Ben Horgan , "James Morse" , Dave Martin , Babu Moger , Fenghua Yu , Borislav Petkov , Thomas Gleixner , "Dave Hansen" , Peter Newman , chen.yu@linux.dev, x86@kernel.org, linux-kernel@vger.kernel.org Subject: [RFC PATCH 12/31] x86/resctrl: Rename struct resctrl_cache to struct resctrl_ctrl_bitmap Date: Mon, 3 Aug 2026 00:05:43 +0800 Message-Id: X-Mailer: git-send-email 2.25.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Rename struct resctrl_cache to struct resctrl_ctrl_bitmap to better reflect its role as the property container for bitmap-type controls. Also rename the union member from 'cache' to 'bitmap' for consistency. This follows the design discussed in the generic schema RFC where controls are classified by type (scalar vs bitmap) rather than by the specific resource they manage (cache allocation). Signed-off-by: Chen Yu --- arch/x86/kernel/cpu/resctrl/core.c | 20 +++++++++--------- drivers/resctrl/mpam_resctrl.c | 8 +++---- fs/resctrl/ctrlmondata.c | 12 +++++------ fs/resctrl/pseudo_lock.c | 2 +- fs/resctrl/rdtgroup.c | 34 +++++++++++++++--------------- include/linux/resctrl.h | 10 ++++----- 6 files changed, 43 insertions(+), 43 deletions(-) diff --git a/arch/x86/kernel/cpu/resctrl/core.c b/arch/x86/kernel/cpu/resctrl/core.c index 9566ee43f206..896906f86da2 100644 --- a/arch/x86/kernel/cpu/resctrl/core.c +++ b/arch/x86/kernel/cpu/resctrl/core.c @@ -167,10 +167,10 @@ static inline void cache_alloc_hsw_probe(void) hw_ctrl->r_ctrl.type = RESCTRL_CTRL_BITMAP; hw_ctrl->r_ctrl.name = RESCTRL_CTRL_NAME_DEF; INIT_LIST_HEAD(&hw_ctrl->r_ctrl.domains); - hw_ctrl->r_ctrl.cache.cbm_len = 20; - hw_ctrl->r_ctrl.cache.shareable_bits = 0xc0000; - hw_ctrl->r_ctrl.cache.min_cbm_bits = 2; - hw_ctrl->r_ctrl.cache.arch_has_sparse_bitmasks = false; + hw_ctrl->r_ctrl.bitmap.cbm_len = 20; + hw_ctrl->r_ctrl.bitmap.shareable_bits = 0xc0000; + hw_ctrl->r_ctrl.bitmap.min_cbm_bits = 2; + hw_ctrl->r_ctrl.bitmap.arch_has_sparse_bitmasks = false; list_add(&hw_ctrl->r_ctrl.entry, &r->controls); hw_res->num_closid = 4; @@ -308,16 +308,16 @@ static void rdt_get_cache_alloc_cfg(int idx, struct rdt_resource *r) hw_ctrl->r_ctrl.name = RESCTRL_CTRL_NAME_DEF; INIT_LIST_HEAD(&hw_ctrl->r_ctrl.domains); - hw_ctrl->r_ctrl.cache.cbm_len = eax.split.cbm_len + 1; + hw_ctrl->r_ctrl.bitmap.cbm_len = eax.split.cbm_len + 1; default_ctrl = BIT_MASK(eax.split.cbm_len + 1) - 1; - hw_ctrl->r_ctrl.cache.shareable_bits = ebx & default_ctrl; + hw_ctrl->r_ctrl.bitmap.shareable_bits = ebx & default_ctrl; if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) { - hw_ctrl->r_ctrl.cache.arch_has_sparse_bitmasks = ecx.split.noncont; - hw_ctrl->r_ctrl.cache.min_cbm_bits = 1; + hw_ctrl->r_ctrl.bitmap.arch_has_sparse_bitmasks = ecx.split.noncont; + hw_ctrl->r_ctrl.bitmap.min_cbm_bits = 1; } else if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD || boot_cpu_data.x86_vendor == X86_VENDOR_HYGON) { - hw_ctrl->r_ctrl.cache.arch_has_sparse_bitmasks = true; - hw_ctrl->r_ctrl.cache.min_cbm_bits = 0; + hw_ctrl->r_ctrl.bitmap.arch_has_sparse_bitmasks = true; + hw_ctrl->r_ctrl.bitmap.min_cbm_bits = 0; } else { return; } diff --git a/drivers/resctrl/mpam_resctrl.c b/drivers/resctrl/mpam_resctrl.c index b97c9b80d0ed..be3bd3d38ef1 100644 --- a/drivers/resctrl/mpam_resctrl.c +++ b/drivers/resctrl/mpam_resctrl.c @@ -1009,11 +1009,11 @@ static int mpam_resctrl_control_init(struct mpam_resctrl_res *res) mpam_ctrl->r_ctrl.name = RESCTRL_CTRL_NAME_DEF; INIT_LIST_HEAD_RCU(&mpam_ctrl->r_ctrl.domains); - mpam_ctrl->r_ctrl.cache.arch_has_sparse_bitmasks = true; + mpam_ctrl->r_ctrl.bitmap.arch_has_sparse_bitmasks = true; - mpam_ctrl->r_ctrl.cache.cbm_len = class->props.cpbm_wd; + mpam_ctrl->r_ctrl.bitmap.cbm_len = class->props.cpbm_wd; /* mpam_devices will reject empty bitmaps */ - mpam_ctrl->r_ctrl.cache.min_cbm_bits = 1; + mpam_ctrl->r_ctrl.bitmap.min_cbm_bits = 1; if (r->rid == RDT_RESOURCE_L2) { r->name = "L2"; @@ -1031,7 +1031,7 @@ static int mpam_resctrl_control_init(struct mpam_resctrl_res *res) * we have configured the SMMU and GIC not to do this 'all the * bits' is the correct answer here. */ - mpam_ctrl->r_ctrl.cache.shareable_bits = resctrl_get_default_ctrlval(&mpam_ctrl->r_ctrl); + mpam_ctrl->r_ctrl.bitmap.shareable_bits = resctrl_get_default_ctrlval(&mpam_ctrl->r_ctrl); list_add(&mpam_ctrl->r_ctrl.entry, &r->controls); r->alloc_capable = true; break; diff --git a/fs/resctrl/ctrlmondata.c b/fs/resctrl/ctrlmondata.c index fd1a9203d6e5..74fa1215e8b2 100644 --- a/fs/resctrl/ctrlmondata.c +++ b/fs/resctrl/ctrlmondata.c @@ -136,8 +136,8 @@ static int parse_bw(struct rdt_parse_data *data, struct rdt_resource_final *f, */ static bool cbm_validate(char *buf, u32 *data, struct resctrl_ctrl *ctrl) { - u32 supported_bits = BIT_MASK(ctrl->cache.cbm_len) - 1; - unsigned int cbm_len = ctrl->cache.cbm_len; + u32 supported_bits = BIT_MASK(ctrl->bitmap.cbm_len) - 1; + unsigned int cbm_len = ctrl->bitmap.cbm_len; unsigned long first_bit, zero_bit, val; int ret; @@ -147,7 +147,7 @@ static bool cbm_validate(char *buf, u32 *data, struct resctrl_ctrl *ctrl) return false; } - if ((ctrl->cache.min_cbm_bits > 0 && val == 0) || val > supported_bits) { + if ((ctrl->bitmap.min_cbm_bits > 0 && val == 0) || val > supported_bits) { rdt_last_cmd_puts("Mask out of range\n"); return false; } @@ -156,15 +156,15 @@ static bool cbm_validate(char *buf, u32 *data, struct resctrl_ctrl *ctrl) zero_bit = find_next_zero_bit(&val, cbm_len, first_bit); /* Are non-contiguous bitmasks allowed? */ - if (!ctrl->cache.arch_has_sparse_bitmasks && + if (!ctrl->bitmap.arch_has_sparse_bitmasks && (find_next_bit(&val, cbm_len, zero_bit) < cbm_len)) { rdt_last_cmd_printf("The mask %lx has non-consecutive 1-bits\n", val); return false; } - if ((zero_bit - first_bit) < ctrl->cache.min_cbm_bits) { + if ((zero_bit - first_bit) < ctrl->bitmap.min_cbm_bits) { rdt_last_cmd_printf("Need at least %d bits in the mask\n", - ctrl->cache.min_cbm_bits); + ctrl->bitmap.min_cbm_bits); return false; } diff --git a/fs/resctrl/pseudo_lock.c b/fs/resctrl/pseudo_lock.c index f2bf6a6b40a4..cece32880a23 100644 --- a/fs/resctrl/pseudo_lock.c +++ b/fs/resctrl/pseudo_lock.c @@ -639,7 +639,7 @@ bool rdtgroup_cbm_overlaps_pseudo_locked(struct rdt_ctrl_domain *d, unsigned lon return false; } - cbm_len = ctrl->cache.cbm_len; + cbm_len = ctrl->bitmap.cbm_len; cbm_b = d->plr->cbm; if (bitmap_intersects(&cbm, &cbm_b, cbm_len)) return true; diff --git a/fs/resctrl/rdtgroup.c b/fs/resctrl/rdtgroup.c index 4392242e63da..cb85108b4a1b 100644 --- a/fs/resctrl/rdtgroup.c +++ b/fs/resctrl/rdtgroup.c @@ -1030,7 +1030,7 @@ static int rdt_min_cbm_bits_show(struct kernfs_open_file *of, if (!ctrl) return 0; - seq_printf(seq, "%u\n", ctrl->cache.min_cbm_bits); + seq_printf(seq, "%u\n", ctrl->bitmap.min_cbm_bits); return 0; } @@ -1045,7 +1045,7 @@ static int rdt_shareable_bits_show(struct kernfs_open_file *of, if (!ctrl) return 0; - seq_printf(seq, "%x\n", ctrl->cache.shareable_bits); + seq_printf(seq, "%x\n", ctrl->bitmap.shareable_bits); return 0; } @@ -1091,7 +1091,7 @@ static int rdt_bit_usage_show(struct kernfs_open_file *of, list_for_each_entry(dom, &ctrl->domains, hdr.list) { if (sep) seq_putc(seq, ';'); - hw_shareable = ctrl->cache.shareable_bits; + hw_shareable = ctrl->bitmap.shareable_bits; sw_shareable = 0; exclusive = 0; seq_printf(seq, "%d=", dom->hdr.id); @@ -1141,7 +1141,7 @@ static int rdt_bit_usage_show(struct kernfs_open_file *of, hw_shareable |= ctrl_val; } - for (i = ctrl->cache.cbm_len - 1; i >= 0; i--) { + for (i = ctrl->bitmap.cbm_len - 1; i >= 0; i--) { pseudo_locked = dom->plr ? dom->plr->cbm : 0; hwb = test_bit(i, &hw_shareable); swb = test_bit(i, &sw_shareable); @@ -1337,7 +1337,7 @@ static int rdt_has_sparse_bitmasks_show(struct kernfs_open_file *of, if (!ctrl) return 0; - seq_printf(seq, "%u\n", ctrl->cache.arch_has_sparse_bitmasks); + seq_printf(seq, "%u\n", ctrl->bitmap.arch_has_sparse_bitmasks); return 0; } @@ -1375,8 +1375,8 @@ static bool __rdtgroup_cbm_overlaps(struct rdt_resource *r, struct rdt_ctrl_doma /* Check for any overlap with regions used by hardware directly */ if (!exclusive) { - ctrl_b = ctrl->cache.shareable_bits; - if (bitmap_intersects(&cbm, &ctrl_b, ctrl->cache.cbm_len)) + ctrl_b = ctrl->bitmap.shareable_bits; + if (bitmap_intersects(&cbm, &ctrl_b, ctrl->bitmap.cbm_len)) return true; } @@ -1386,7 +1386,7 @@ static bool __rdtgroup_cbm_overlaps(struct rdt_resource *r, struct rdt_ctrl_doma mode = rdtgroup_mode_by_closid(i); if (closid_allocated(i) && i != closid && mode != RDT_MODE_PSEUDO_LOCKSETUP) { - if (bitmap_intersects(&cbm, &ctrl_b, ctrl->cache.cbm_len)) { + if (bitmap_intersects(&cbm, &ctrl_b, ctrl->bitmap.cbm_len)) { if (exclusive) { if (mode == RDT_MODE_EXCLUSIVE) return true; @@ -1591,10 +1591,10 @@ unsigned int rdtgroup_cbm_to_size(struct rdt_resource *r, struct resctrl_ctrl *c if (WARN_ON_ONCE(ctrl->scope != RESCTRL_L2_CACHE && ctrl->scope != RESCTRL_L3_CACHE)) return size; - num_b = bitmap_weight(&cbm, ctrl->cache.cbm_len); + num_b = bitmap_weight(&cbm, ctrl->bitmap.cbm_len); ci = get_cpu_cacheinfo_level(cpumask_any(&d->hdr.cpu_mask), ctrl->scope); if (ci) - size = ci->size / ctrl->cache.cbm_len * num_b; + size = ci->size / ctrl->bitmap.cbm_len * num_b; return size; } @@ -3883,11 +3883,11 @@ static int mkdir_mondata_all(struct kernfs_node *parent_kn, static u32 cbm_ensure_valid(u32 _val, struct rdt_resource *r, struct resctrl_ctrl *ctrl) { - unsigned int cbm_len = ctrl->cache.cbm_len; + unsigned int cbm_len = ctrl->bitmap.cbm_len; unsigned long first_bit, zero_bit; unsigned long val; - if (!_val || ctrl->cache.arch_has_sparse_bitmasks) + if (!_val || ctrl->bitmap.arch_has_sparse_bitmasks) return _val; val = _val; @@ -3920,8 +3920,8 @@ static int __init_one_rdt_domain(struct rdt_ctrl_domain *d, struct rdt_resource_ cfg = &d->staged_config[t]; cfg->have_new_ctrl = false; - cfg->new_ctrl = ctrl->cache.shareable_bits; - used_b = ctrl->cache.shareable_bits; + cfg->new_ctrl = ctrl->bitmap.shareable_bits; + used_b = ctrl->bitmap.shareable_bits; for (i = 0; i < closids_supported(); i++) { if (closid_allocated(i) && i != closid) { mode = rdtgroup_mode_by_closid(i); @@ -3951,8 +3951,8 @@ static int __init_one_rdt_domain(struct rdt_ctrl_domain *d, struct rdt_resource_ } if (d->plr && d->plr->cbm > 0) used_b |= d->plr->cbm; - unused_b = used_b ^ (BIT_MASK(ctrl->cache.cbm_len) - 1); - unused_b &= BIT_MASK(ctrl->cache.cbm_len) - 1; + unused_b = used_b ^ (BIT_MASK(ctrl->bitmap.cbm_len) - 1); + unused_b &= BIT_MASK(ctrl->bitmap.cbm_len) - 1; cfg->new_ctrl |= unused_b; /* * Force the initial CBM to be valid, user can @@ -3964,7 +3964,7 @@ static int __init_one_rdt_domain(struct rdt_ctrl_domain *d, struct rdt_resource_ * bitmap_weight() does not access out-of-bound memory. */ tmp_cbm = cfg->new_ctrl; - if (bitmap_weight(&tmp_cbm, ctrl->cache.cbm_len) < ctrl->cache.min_cbm_bits) { + if (bitmap_weight(&tmp_cbm, ctrl->bitmap.cbm_len) < ctrl->bitmap.min_cbm_bits) { rdt_last_cmd_printf("No space on %s:%d\n", f->name, d->hdr.id); return -ENOSPC; } diff --git a/include/linux/resctrl.h b/include/linux/resctrl.h index f54a889c6d99..c23c2f8bf2d1 100644 --- a/include/linux/resctrl.h +++ b/include/linux/resctrl.h @@ -211,7 +211,7 @@ struct rdt_l3_mon_domain { }; /** - * struct resctrl_cache - Cache allocation related data + * struct resctrl_ctrl_bitmap - Bitmap control type properties * @cbm_len: Length of the cache bit mask * @min_cbm_bits: Minimum number of consecutive bits to be set. * The value 0 means the architecture can support @@ -220,7 +220,7 @@ struct rdt_l3_mon_domain { * executing entities * @arch_has_sparse_bitmasks: True if a bitmask like f00f is valid. */ -struct resctrl_cache { +struct resctrl_ctrl_bitmap { unsigned int cbm_len; unsigned int min_cbm_bits; unsigned int shareable_bits; @@ -369,7 +369,7 @@ enum resctrl_ctrl_name { * Specifically, "rdt_resource_final::name"_"resctrl_ctrl::name". * For example, with resource name "MB" and control name "MAX" the * schema entry will be "MB_MAX". - * @cache: Cache allocation control properties. + * @bitmap: Bitmap control properties. * @scalar: Scalar control properties. */ struct resctrl_ctrl { @@ -379,7 +379,7 @@ struct resctrl_ctrl { enum resctrl_ctrl_type type; enum resctrl_ctrl_name name; union { - struct resctrl_cache cache; + struct resctrl_ctrl_bitmap bitmap; struct resctrl_ctrl_scalar scalar; }; }; @@ -481,7 +481,7 @@ static inline u32 resctrl_get_default_ctrlval(struct resctrl_ctrl *ctrl) { switch (ctrl->type) { case RESCTRL_CTRL_BITMAP: - return BIT_MASK(ctrl->cache.cbm_len) - 1; + return BIT_MASK(ctrl->bitmap.cbm_len) - 1; case RESCTRL_CTRL_SCALAR: return ctrl->scalar.max_bw; } -- 2.43.0