From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754557AbdBPNWt (ORCPT ); Thu, 16 Feb 2017 08:22:49 -0500 Received: from mx1.redhat.com ([209.132.183.28]:49694 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754065AbdBPNWr (ORCPT ); Thu, 16 Feb 2017 08:22:47 -0500 Subject: Re: [RFC PATCH 04/33] irqchip/gic-v3-its: Move LPI definitions around To: Marc Zyngier , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu References: <1484648454-21216-1-git-send-email-marc.zyngier@arm.com> <1484648454-21216-5-git-send-email-marc.zyngier@arm.com> Cc: Thomas Gleixner , Jason Cooper , Christoffer Dall From: Auger Eric Message-ID: Date: Thu, 16 Feb 2017 14:22:43 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.4.0 MIME-Version: 1.0 In-Reply-To: <1484648454-21216-5-git-send-email-marc.zyngier@arm.com> Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.32]); Thu, 16 Feb 2017 13:22:48 +0000 (UTC) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Marc, On 17/01/2017 11:20, Marc Zyngier wrote: > The various LPI definitions are in the middle of the code, and > would be better placed at the beginning, given that we're going > to use some of them much earlier. > > Signed-off-by: Marc Zyngier Reviewed-by: Eric Auger Eric > --- > drivers/irqchip/irq-gic-v3-its.c | 27 +++++++++++++++------------ > 1 file changed, 15 insertions(+), 12 deletions(-) > > diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c > index 49b681e..2ca27f6 100644 > --- a/drivers/irqchip/irq-gic-v3-its.c > +++ b/drivers/irqchip/irq-gic-v3-its.c > @@ -49,6 +49,21 @@ > #define RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING (1 << 0) > > /* > + * We allocate 64kB for PROPBASE. That gives us at most 64K LPIs to > + * deal with (one configuration byte per interrupt). PENDBASE has to > + * be 64kB aligned (one bit per LPI, plus 8192 bits for SPI/PPI/SGI). > + */ > +#define LPI_PROPBASE_SZ SZ_64K > +#define LPI_PENDBASE_SZ (LPI_PROPBASE_SZ / 8 + SZ_1K) > + > +/* > + * This is how many bits of ID we need, including the useless ones. > + */ > +#define LPI_NRBITS ilog2(LPI_PROPBASE_SZ + SZ_8K) > + > +#define LPI_PROP_DEFAULT_PRIO 0xa0 > + > +/* > * Collection structure - just an ID, and a redistributor address to > * ping. We use one per CPU as a bag of interrupts assigned to this > * CPU. > @@ -779,20 +794,8 @@ static void its_lpi_free(struct event_lpi_map *map) > kfree(map->col_map); > } > > -/* > - * We allocate 64kB for PROPBASE. That gives us at most 64K LPIs to > - * deal with (one configuration byte per interrupt). PENDBASE has to > - * be 64kB aligned (one bit per LPI, plus 8192 bits for SPI/PPI/SGI). > - */ > -#define LPI_PROPBASE_SZ SZ_64K > -#define LPI_PENDBASE_SZ (LPI_PROPBASE_SZ / 8 + SZ_1K) > > -/* > - * This is how many bits of ID we need, including the useless ones. > - */ > -#define LPI_NRBITS ilog2(LPI_PROPBASE_SZ + SZ_8K) > > -#define LPI_PROP_DEFAULT_PRIO 0xa0 > > static int __init its_alloc_lpi_tables(void) > { >