From: liulongfang <liulongfang@huawei.com>
To: <alex.williamson@redhat.com>, <jgg@nvidia.com>,
<herbert@gondor.apana.org.au>,
<shameerali.kolothum.thodi@huawei.com>,
<jonathan.cameron@huawei.com>
Cc: <linux-crypto@vger.kernel.org>, <kvm@vger.kernel.org>,
<linux-kernel@vger.kernel.org>, <linuxarm@openeuler.org>
Subject: Re: [PATCH v7 2/3] migration: qm updates BAR configuration
Date: Tue, 19 Aug 2025 17:12:52 +0800 [thread overview]
Message-ID: <d369be68-918a-dcad-e5dd-fd70ec42516c@huawei.com> (raw)
In-Reply-To: <20250805065106.898298-3-liulongfang@huawei.com>
On 2025/8/5 14:51, Longfang Liu wrote:
> On new platforms greater than QM_HW_V3, the configuration region for the
> live migration function of the accelerator device is no longer
> placed in the VF, but is instead placed in the PF.
>
> Therefore, the configuration region of the live migration function
> needs to be opened when the QM driver is loaded. When the QM driver
> is uninstalled, the driver needs to clear this configuration.
>
> Signed-off-by: Longfang Liu <liulongfang@huawei.com>
> Reviewed-by: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com>
>
> Acked-by: Herbert Xu <herbert@gondor.apana.org.au>
> ---
> drivers/crypto/hisilicon/qm.c | 29 +++++++++++++++++++++++++++++
> 1 file changed, 29 insertions(+)
>
> diff --git a/drivers/crypto/hisilicon/qm.c b/drivers/crypto/hisilicon/qm.c
> index 7c41f9593d03..b5ce9b1e9c56 100644
> --- a/drivers/crypto/hisilicon/qm.c
> +++ b/drivers/crypto/hisilicon/qm.c
> @@ -242,6 +242,9 @@
> #define QM_QOS_MAX_CIR_U 6
> #define QM_AUTOSUSPEND_DELAY 3000
>
> +#define QM_MIG_REGION_SEL 0x100198
> +#define QM_MIG_REGION_EN 0x1
> +
> /* abnormal status value for stopping queue */
> #define QM_STOP_QUEUE_FAIL 1
> #define QM_DUMP_SQC_FAIL 3
> @@ -3004,11 +3007,36 @@ static void qm_put_pci_res(struct hisi_qm *qm)
> pci_release_mem_regions(pdev);
> }
>
> +static void hisi_mig_region_clear(struct hisi_qm *qm)
> +{
> + u32 val;
> +
> + /* Clear migration region set of PF */
> + if (qm->fun_type == QM_HW_PF && qm->ver > QM_HW_V3) {
> + val = readl(qm->io_base + QM_MIG_REGION_SEL);
> + val &= ~BIT(0);
> + writel(val, qm->io_base + QM_MIG_REGION_SEL);
> + }
> +}
> +
> +static void hisi_mig_region_enable(struct hisi_qm *qm)
> +{
> + u32 val;
> +
> + /* Select migration region of PF */
> + if (qm->fun_type == QM_HW_PF && qm->ver > QM_HW_V3) {
> + val = readl(qm->io_base + QM_MIG_REGION_SEL);
> + val |= QM_MIG_REGION_EN;
> + writel(val, qm->io_base + QM_MIG_REGION_SEL);
> + }
> +}
> +
> static void hisi_qm_pci_uninit(struct hisi_qm *qm)
> {
> struct pci_dev *pdev = qm->pdev;
>
> pci_free_irq_vectors(pdev);
> + hisi_mig_region_clear(qm);
> qm_put_pci_res(qm);
> pci_disable_device(pdev);
> }
> @@ -5630,6 +5658,7 @@ int hisi_qm_init(struct hisi_qm *qm)
> goto err_free_qm_memory;
>
> qm_cmd_init(qm);
> + hisi_mig_region_enable(qm);
>
> return 0;
>
>
Hello, Herbert. There is a patch in this patchset that modifies the crypto subsystem.
Could this patch be merged into the crypto next branch?
Thanks.
Longfang.
next prev parent reply other threads:[~2025-08-19 9:12 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-05 6:51 [PATCH v7 0/3] update live migration configuration region Longfang Liu
2025-08-05 6:51 ` [PATCH v7 1/3] migration: update BAR space size Longfang Liu
2025-08-05 6:51 ` [PATCH v7 2/3] migration: qm updates BAR configuration Longfang Liu
2025-08-19 9:12 ` liulongfang [this message]
2025-08-19 9:53 ` Herbert Xu
2025-08-19 10:56 ` liulongfang
2025-08-05 6:51 ` [PATCH v7 3/3] migration: adapt to new migration configuration Longfang Liu
2025-08-19 21:35 ` Alex Williamson
2025-08-20 1:53 ` liulongfang
2025-08-19 9:14 ` [PATCH v7 0/3] update live migration configuration region liulongfang
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