Re: [Patch v4 00/16] Cache aware scheduling enhancements

["Chen, Yu C" <yu.c.chen@intel.com>]

Hi Prateek,

On 5/20/2026 11:05 AM, K Prateek Nayak wrote:
> Hello Tim, Chenyu,
> 
> On 5/14/2026 2:09 AM, Tim Chen wrote:
>> This patch set contains cache-aware scheduling enhancements
>> and bug fixes on top of Peter's sched/cache branch:
>> https://git.kernel.org/pub/scm/linux/kernel/git/peterz/queue.git/log/?h=sched/cache
> 
> I took the latest queue:sched/core for a spin before and after
> the sched/cache merge and everything is now looking fine.
> 
> I've temporary lost access to my usual test machine so I could only grab
> the microbenchmark data but they are mostly positive to unaffected as
> expected. I'll update if I see anything funky with longer running
> benchmarks if and when I get a chance.
> 
[ ... ]
> 
> Thanks a ton! And sorry for not having been the most responsive on the
> latest iterations.
> 

Thanks very much for your help with this series!

I have kicked off the server-side tests based on sched/core.
I suppose cache-aware scheduling can still leverage sd_llc_share
after applying Peter’s patch and yours, allowing the sched domain
share data for SD_SHARE_LLC and SD_ASYM_CPUCAPACITY to coexist.

Additionally, since sched/core includes optimizations for selecting
SMT cores during asymmetric-capacity wakeups, I have also set up
big.LITTLE systems for testing. One testbed features P-cores with
SMT enabled while E-cores run without SMT support. I am simply curious
to see how the benchmark data turns out.

thanks,
Chenyu