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Tue, 25 Aug 2026 01:55:02 -0700 (PDT) X-Received: by 2002:a05:620a:1790:b0:936:2f59:dfe4 with SMTP id af79cd13be357-937392b8125mr2182943385a.0.1787648101597; Tue, 25 Aug 2026 01:55:01 -0700 (PDT) Received: from [192.168.120.193] ([178.235.128.140]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-c2496738e8bsm1606744466b.44.2026.08.25.01.54.59 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 25 Aug 2026 01:55:00 -0700 (PDT) Message-ID: Date: Tue, 25 Aug 2026 10:54:58 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 4/5] phy: qcom: snps-femto-v2: Move PHY init registers to config tables To: Varadarajan Narayanan , Vinod Koul , Neil Armstrong , Manivannan Sadhasivam , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Wesley Cheng Cc: linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20260824-phy-v1-0-257d68a3210b@oss.qualcomm.com> <20260824-phy-v1-4-257d68a3210b@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20260824-phy-v1-4-257d68a3210b@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-ORIG-GUID: 6o5LGJBJLISdacT2YRyQmZdFY-f3sO9s X-Proofpoint-GUID: 6o5LGJBJLISdacT2YRyQmZdFY-f3sO9s X-Proofpoint-Spam-Info: AW1haW4tMjYwODI1MDA3NSBTYWx0ZWRfXzno4qdC44D6R TYj3myNEeIYxqbUU/i/l/mWsZXnR7eQyEXZsvANBWP9H28FPCQJsY+Idw48HGcMVicmIfdt5CAD hbahwZw+wQ82K0SHBEPNW2rdQs/N5vI= X-Authority-Analysis: v=2.4 cv=TqPWQjXh c=1 sm=1 tr=0 ts=6a8d5867 cx=c_pps a=mPf7EqFMSY9/WdsSgAYMbA==:117 a=PRfkaYvzSr8QmIIGAkY2Sg==:17 a=IkcTkHD0fZMA:10 a=Sv0fKeRqtYgA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=eoimf2acIAo5FJnRuUoq:22 a=EUspDBNiAAAA:8 a=i2kGgbFhGYZGOrntVjUA:9 a=QEXdDO2ut3YA:10 a=dawVfQjAaf238kedN5IG:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwODI1MDA3NSBTYWx0ZWRfX5SXjE5BCUPT5 07lwzWRTkWvROd8KtHmZ5RFsJKhZpauH6IFXQHPYLf1DGORp7SKEPT1HJCCf4WgVV5SOMe+dxL3 33Nu0kRH+JQRL4RYf6sCpreLwSUF8Nv2txUHMD1kawo3gZBBheW9BJFi4A4sjFxfCROIXdXY95u 0F0M2VbNKqfOQqznMq4RdQTdddUAoV8emdaZoxnYdlpzRhzv5+DFpzqQeKdtQZYCZX0M9tR+op+ d24TwjofTJoOXpoyvuhsuQ/X4rIk8TmkW8n2ff50AUEtLOzEnQOBYCqhr9EDKvSdKXMWtIRooVX WGkd1saOtNNGmsBlei+VITwoRAboENw2ikyPWgSW/p0LZY1zYtJGd6LOUvdpt13a/Ds/8lCpUGq gt3t8hQA4grG+yv/ktTba8kGXQh6tS4ikQk/FoerAnNc89QHIIvV3eM5cCs05RF6K1tmxRXq0tW quPG9aEC+RqDn6d9/0w== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-08-25_02,2026-08-24_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 impostorscore=0 malwarescore=0 spamscore=0 phishscore=0 lowpriorityscore=0 clxscore=1015 suspectscore=0 priorityscore=1501 adultscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2608250075 On 8/24/26 8:37 AM, Varadarajan Narayanan wrote: > The driver currently programs the common PHY register sequence directly in > qcom_snps_hsphy_init(), with the fixed register writes split around the > override parameter handling. This makes it hard to support SoCs that need a > different sequence or different values. > > Move the fixed pre- and post-override register programming into per- > compatible configuration tables, and keep the 7 nm override parameters in > the same match-data structure. This allows the driver to share the common > sequence while adding SoC-specific sequences for future platforms such as > IPQ9650. > > Signed-off-by: Varadarajan Narayanan > --- [...] > + for (tmp = data->pre; tmp->offset != UINT_MAX; tmp++) "pre"/"post" alone are not descriptive - perhaps pre_tuning/post_tuning? Or do we maybe know whether the order matters at all? > + qcom_snps_hsphy_write_mask(hsphy->base, tmp->offset, tmp->mask, tmp->val); Custom termination is both error-prone and memory-inefficient, add another int to size the arrays Konrad