From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail.mindbit.ro (xs1.mindbit.ro [80.86.107.70]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B693C2494FE for ; Sat, 4 Jul 2026 15:37:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=80.86.107.70 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783179456; cv=none; b=G1KJJ7yK1pCaICcatZtF7aQ3QBZWUAD3huh8yXoJ1lNEtfgYnnqXvI7vRb3HGSEhwo2FXplemoygCtTYqKoysMRehK5Cl08pQb20nlVWhuSCu5IReFFQ3/SFTSzd3kaVb0av6sZ4aFA1qdhPyilDBNJFCYQsBDLcz7vXM7K576k= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783179456; c=relaxed/simple; bh=yi4ywocH8paXFG2R0PEnBuIiWLu0AlOzCHNG0Nrh1Ro=; h=Message-ID:Subject:From:To:Cc:Date:In-Reply-To:References: Content-Type:MIME-Version; b=JoQ9lX7RHOfsF+4Tk2WZEgq9plwUifHHf9HNHqjkOMivk9U+0Rs2kVHnBiIvhkfz+YL1Z8dLSwpj4A+KYCcse5X7MQieAgf5prmmv5XbCUpzxzKhiPmsB2vSLPdDZc9MnNT9rQG1E4nl+ZUd5nDIQq0PyAAQDevYICS4F3NTFaE= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=rendec.net; spf=pass smtp.mailfrom=rendec.net; dkim=pass (2048-bit key) header.d=rendec.net header.i=@rendec.net header.b=jcKwdO5/; arc=none smtp.client-ip=80.86.107.70 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=rendec.net Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=rendec.net Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=rendec.net header.i=@rendec.net header.b="jcKwdO5/" Received: from dog.kanata.rendec.net (pool-174-112-193-187.cpe.net.cable.rogers.com [174.112.193.187]) by mail.mindbit.ro (Postfix) with ESMTPSA id 3C839C24ED; Sat, 4 Jul 2026 18:37:31 +0300 (EEST) DKIM-Filter: OpenDKIM Filter v2.11.0 mail.mindbit.ro 3C839C24ED DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rendec.net; s=default; t=1783179452; bh=XQ4AJiWAm+L4niUK8fWwPrbQMZnP/qV6l8zH88nrcgQ=; h=Subject:From:To:Cc:Date:In-Reply-To:References:From; b=jcKwdO5/NLvVvxSt+j+jee/1o7eobnBDNhsSMSyZblSpLyQ+jvtfQg3hyyajl7ZMW /uDVhDGGSZQweauMxi8GlpaiARUiSQg5VNp+N+zjqD7spNWwKjOVYYiu+ZPQuneP7q l75rv6hIkobTr2zB4p7HQ/DR2GSY/nbSKfE/7N0on5Pap0zAD7+pZ5lWZkI8tB5+s6 ODPxuhKXFg23E+cVz63ig1ZTmuGqwTJL7YQkmFH8j/iP++5Hyos1VmQJMcD4Z8yVXQ NPihiaJcNFayQN+td67sRTfQnvuoty0DPNcCtlm0NFc/b3jqJ3S0NEf+qN9leDVtxs OKqXp5RNiIJLA== Message-ID: Subject: Re: [PATCH v4 5/6] irqchip/gic-v3-its: Fix grammar and replace a bit number with its symbol From: Radu Rendec To: Kemeng Shi , maz@kernel.org, tglx@kernel.org, jason@lakedaemon.net, lpieralisi@kernel.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Date: Sat, 04 Jul 2026 11:37:29 -0400 In-Reply-To: <20260702033050.1583-6-shikemeng@huaweicloud.com> References: <20260702033050.1583-1-shikemeng@huaweicloud.com> <20260702033050.1583-6-shikemeng@huaweicloud.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.58.3 (3.58.3-1.fc43) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 On Thu, 2026-07-02 at 11:30 +0800, Kemeng Shi wrote: > Fix grammatical errors in comments and replace the bit offset '62' > with GITS_BASER_INDIRECT for better readability. >=20 > Signed-off-by: Kemeng Shi > --- > =C2=A0drivers/irqchip/irq-gic-v3-its.c | 4 ++-- > =C2=A01 file changed, 2 insertions(+), 2 deletions(-) >=20 > diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v= 3-its.c > index 244509701070..120f6f29e978 100644 > --- a/drivers/irqchip/irq-gic-v3-its.c > +++ b/drivers/irqchip/irq-gic-v3-its.c > @@ -163,7 +163,7 @@ struct event_lpi_map { > =C2=A0 > =C2=A0/* > =C2=A0 * The ITS view of a device - belongs to an ITS, owns an interrupt > - * translation table, and a list of interrupts.=C2=A0 If it some of its > + * translation table, and a list of interrupts.=C2=A0 If some of its > =C2=A0 * LPIs are injected into a guest (GICv4), the event_map.vm field > =C2=A0 * indicates which one. > =C2=A0 */ > @@ -2504,7 +2504,7 @@ static bool its_parse_indirect_baser(struct its_nod= e *its, > =C2=A0 if ((esz << ids) > (psz * 2)) { > =C2=A0 /* > =C2=A0 * Find out whether hw supports a single or two-level table by > - * table by reading bit at offset '62' after writing '1' to it. > + * reading GITS_BASER_INDIRECT after writing '1' to it. I think the second line is redundant anyway. Anyone who can read C can immediately see the code is checking the bit after setting it to 1. The not so obvious part is that the read back happens in its_write_baser(). But the way the code is written implies that baser->val is somehow updated in its_write_baser(), and if one looks at it, then it's clear. In the original comment, "table by" appeared twice. I would just get rid of the second line altogether and stop at "table". > =C2=A0 */ > =C2=A0 its_write_baser(its, baser, val | GITS_BASER_INDIRECT); > =C2=A0 indirect =3D !!(baser->val & GITS_BASER_INDIRECT);