From: Jiangyifei <jiangyifei@huawei.com>
To: Anup Patel <anup.patel@wdc.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Palmer Dabbelt <palmerdabbelt@google.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Paolo Bonzini <pbonzini@redhat.com>
Cc: Alexander Graf <graf@amazon.com>,
Atish Patra <atish.patra@wdc.com>,
Alistair Francis <Alistair.Francis@wdc.com>,
Damien Le Moal <damien.lemoal@wdc.com>,
Anup Patel <anup@brainfault.org>,
"kvm@vger.kernel.org" <kvm@vger.kernel.org>,
"kvm-riscv@lists.infradead.org" <kvm-riscv@lists.infradead.org>,
"linux-riscv@lists.infradead.org"
<linux-riscv@lists.infradead.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
Daniel Lezcano <daniel.lezcano@linaro.org>
Subject: RE: [PATCH v15 12/17] RISC-V: KVM: Add timer functionality
Date: Wed, 23 Dec 2020 03:30:43 +0000 [thread overview]
Message-ID: <d3f3a7aea01c49afb9cadccd47498854@huawei.com> (raw)
In-Reply-To: <20201109113240.3733496-13-anup.patel@wdc.com>
> -----Original Message-----
> From: Anup Patel [mailto:anup.patel@wdc.com]
> Sent: Monday, November 9, 2020 7:33 PM
> To: Palmer Dabbelt <palmer@dabbelt.com>; Palmer Dabbelt
> <palmerdabbelt@google.com>; Paul Walmsley <paul.walmsley@sifive.com>;
> Albert Ou <aou@eecs.berkeley.edu>; Paolo Bonzini <pbonzini@redhat.com>
> Cc: Alexander Graf <graf@amazon.com>; Atish Patra <atish.patra@wdc.com>;
> Alistair Francis <Alistair.Francis@wdc.com>; Damien Le Moal
> <damien.lemoal@wdc.com>; Anup Patel <anup@brainfault.org>;
> kvm@vger.kernel.org; kvm-riscv@lists.infradead.org;
> linux-riscv@lists.infradead.org; linux-kernel@vger.kernel.org; Anup Patel
> <anup.patel@wdc.com>; Daniel Lezcano <daniel.lezcano@linaro.org>
> Subject: [PATCH v15 12/17] RISC-V: KVM: Add timer functionality
>
> From: Atish Patra <atish.patra@wdc.com>
>
> The RISC-V hypervisor specification doesn't have any virtual timer feature.
>
> Due to this, the guest VCPU timer will be programmed via SBI calls.
> The host will use a separate hrtimer event for each guest VCPU to provide
> timer functionality. We inject a virtual timer interrupt to the guest VCPU
> whenever the guest VCPU hrtimer event expires.
>
> This patch adds guest VCPU timer implementation along with ONE_REG
> interface to access VCPU timer state from user space.
>
> Signed-off-by: Atish Patra <atish.patra@wdc.com>
> Signed-off-by: Anup Patel <anup.patel@wdc.com>
> Acked-by: Paolo Bonzini <pbonzini@redhat.com>
> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
> ---
> arch/riscv/include/asm/kvm_host.h | 7 +
> arch/riscv/include/asm/kvm_vcpu_timer.h | 44 +++++
> arch/riscv/include/uapi/asm/kvm.h | 17 ++
> arch/riscv/kvm/Makefile | 2 +-
> arch/riscv/kvm/vcpu.c | 14 ++
> arch/riscv/kvm/vcpu_timer.c | 225
> ++++++++++++++++++++++++
> arch/riscv/kvm/vm.c | 2 +-
> drivers/clocksource/timer-riscv.c | 8 +
> include/clocksource/timer-riscv.h | 16 ++
> 9 files changed, 333 insertions(+), 2 deletions(-) create mode 100644
> arch/riscv/include/asm/kvm_vcpu_timer.h
> create mode 100644 arch/riscv/kvm/vcpu_timer.c create mode 100644
> include/clocksource/timer-riscv.h
>
> diff --git a/arch/riscv/include/asm/kvm_host.h
> b/arch/riscv/include/asm/kvm_host.h
> index 64311b262ee1..4daffc93f36a 100644
> --- a/arch/riscv/include/asm/kvm_host.h
> +++ b/arch/riscv/include/asm/kvm_host.h
> @@ -12,6 +12,7 @@
> #include <linux/types.h>
> #include <linux/kvm.h>
> #include <linux/kvm_types.h>
> +#include <asm/kvm_vcpu_timer.h>
>
> #ifdef CONFIG_64BIT
> #define KVM_MAX_VCPUS (1U << 16)
> @@ -66,6 +67,9 @@ struct kvm_arch {
> /* stage2 page table */
> pgd_t *pgd;
> phys_addr_t pgd_phys;
> +
> + /* Guest Timer */
> + struct kvm_guest_timer timer;
> };
>
...
> diff --git a/arch/riscv/include/uapi/asm/kvm.h
> b/arch/riscv/include/uapi/asm/kvm.h
> index f7e9dc388d54..00196a13d743 100644
> --- a/arch/riscv/include/uapi/asm/kvm.h
> +++ b/arch/riscv/include/uapi/asm/kvm.h
> @@ -74,6 +74,18 @@ struct kvm_riscv_csr {
> unsigned long scounteren;
> };
>
> +/* TIMER registers for KVM_GET_ONE_REG and KVM_SET_ONE_REG */
> struct
> +kvm_riscv_timer {
> + u64 frequency;
> + u64 time;
> + u64 compare;
> + u64 state;
> +};
> +
Hi,
There are some building errors when we build kernel by using allmodconfig.
The commands are as follow:
$ make allmodconfig ARCH=riscv CROSS_COMPILE=riscv64-linux-gnu-
$ make -j64 ARCH=riscv CROSS_COMPILE=riscv64-linux-gnu-
The following error occurs:
[stdout] usr/include/Makefile:108: recipe for target 'usr/include/asm/kvm.hdrtest' failed
[stderr] ./usr/include/asm/kvm.h:79:2: error: unknown type name 'u64'
[stderr] u64 frequency;
[stderr] ^~~
[stderr] ./usr/include/asm/kvm.h:80:2: error: unknown type name 'u64'
[stderr] u64 time;
[stderr] ^~~
[stderr] ./usr/include/asm/kvm.h:81:2: error: unknown type name 'u64'
[stderr] u64 compare;
[stderr] ^~~
[stderr] ./usr/include/asm/kvm.h:82:2: error: unknown type name 'u64'
[stderr] u64 state;
[stderr] ^~~
[stderr] make[2]: *** [usr/include/asm/kvm.hdrtest] Error 1
Is it better to change u64 to __u64?
Regards,
Yifei
next prev parent reply other threads:[~2020-12-23 3:31 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-09 11:32 [PATCH v15 00/17] KVM RISC-V Support Anup Patel
2020-11-09 11:32 ` [PATCH v15 01/17] RISC-V: Add hypervisor extension related CSR defines Anup Patel
2020-11-09 11:32 ` [PATCH v15 02/17] RISC-V: Add initial skeletal KVM support Anup Patel
2020-11-09 11:32 ` [PATCH v15 03/17] RISC-V: KVM: Implement VCPU create, init and destroy functions Anup Patel
2020-11-09 11:32 ` [PATCH v15 04/17] RISC-V: KVM: Implement VCPU interrupts and requests handling Anup Patel
2020-11-09 11:32 ` [PATCH v15 05/17] RISC-V: KVM: Implement KVM_GET_ONE_REG/KVM_SET_ONE_REG ioctls Anup Patel
2020-11-09 11:32 ` [PATCH v15 06/17] RISC-V: KVM: Implement VCPU world-switch Anup Patel
2020-11-09 11:32 ` [PATCH v15 07/17] RISC-V: KVM: Handle MMIO exits for VCPU Anup Patel
2020-11-09 11:32 ` [PATCH v15 08/17] RISC-V: KVM: Handle WFI " Anup Patel
2020-11-09 11:32 ` [PATCH v15 09/17] RISC-V: KVM: Implement VMID allocator Anup Patel
2020-11-09 11:32 ` [PATCH v15 10/17] RISC-V: KVM: Implement stage2 page table programming Anup Patel
2020-11-16 9:29 ` Jiangyifei
2020-11-24 9:26 ` Anup Patel
2020-11-30 10:21 ` Anup Patel
2020-12-01 2:02 ` Jiangyifei
2020-11-09 11:32 ` [PATCH v15 11/17] RISC-V: KVM: Implement MMU notifiers Anup Patel
2020-11-09 11:32 ` [PATCH v15 12/17] RISC-V: KVM: Add timer functionality Anup Patel
2020-12-23 3:30 ` Jiangyifei [this message]
2020-12-26 10:26 ` Anup Patel
2020-11-09 11:32 ` [PATCH v15 13/17] RISC-V: KVM: FP lazy save/restore Anup Patel
2020-11-09 11:32 ` [PATCH v15 14/17] RISC-V: KVM: Implement ONE REG interface for FP registers Anup Patel
2020-11-09 11:32 ` [PATCH v15 15/17] RISC-V: KVM: Add SBI v0.1 support Anup Patel
2020-11-09 11:32 ` [PATCH v15 16/17] RISC-V: KVM: Document RISC-V specific parts of KVM API Anup Patel
2020-11-09 11:32 ` [PATCH v15 17/17] RISC-V: KVM: Add MAINTAINERS entry Anup Patel
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