From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail.zytor.com (terminus.zytor.com [198.137.202.136]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 99439286891; Mon, 15 Sep 2025 17:21:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.137.202.136 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757956880; cv=none; b=QR3XuOu2wJ8O3cgEwXYc1m9nVGd7zynY2fbfj0McE8ZYLcvwllfuh2EZGX34eYnYtUsxG/RQ92kTN2PhcszLGQXTGMAfQSMmmM5P9W8HE+UpFGkPDNC4/E01+ckmUUjMp2wT4Sc0mi3/2KzJG5ilT/8Nj43jXwXFxUQkbQPDuR8= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757956880; c=relaxed/simple; bh=o1b/fDtd35x9x3J5GZJ10hfQ/p2pwRmB9aFJ7RDgwzI=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=SKIqETBBPxex+6U0xRsTV03wAgGjKnrMLqa2LSB17QXjiSP4q4dy8W+9kPnAZrvjkpbjeFdb6Ssw6ttJAsYZWoNXIr5+OJG4Iccb/qQx0efNlqioHECF9RBiS8Ite+BgpGw74YDcM+k/hxJpurp8nJyZHEURtxS0X/214r2+b78= ARC-Authentication-Results:i=1; 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b=IwylzrYqJnro61LhvmKVj+8WK/dm58X4oq8cFnregnbCTNLFEkWvxnrKuzVW2Axns ++hQO1QUov3u9LyyM0IaHzSiky+PCzFpHtXRSK6t8wabd+sS3IdaR98PlaW/8sdB4x g0K98vkhjq3xPSg/XXHHQcsXUITyJpjNc/+6IHuxuv7fY8jAgXuFnM6eHlb6HApRKT k3i1j30wY+thE0UDrljzsC8XUqo5ubnMTAPzWNkZLL2Tj9ags+f9OAilqN6mw/NDbY a99eTkSXrk59ZD7SePRJP7fuUDKxLgDNfwsV3RjcoA3ROYd2mmRndqbOvQ6fvvy3SM D1fXO9t4eSTKQ== Message-ID: Date: Mon, 15 Sep 2025 10:21:01 -0700 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v15 16/41] KVM: VMX: Set up interception for CET MSRs To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Tom Lendacky , Mathias Krause , John Allen , Rick Edgecombe , Chao Gao , Maxim Levitsky , Xiaoyao Li , Zhang Yi Z References: <20250912232319.429659-1-seanjc@google.com> <20250912232319.429659-17-seanjc@google.com> Content-Language: en-US From: Xin Li Autocrypt: addr=xin@zytor.com; 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charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 9/12/2025 4:22 PM, Sean Christopherson wrote: > From: Yang Weijiang > > Enable/disable CET MSRs interception per associated feature configuration. > > Pass through CET MSRs that are managed by XSAVE, as they cannot be > intercepted without also intercepting XSAVE. However, intercepting XSAVE > would likely cause unacceptable performance overhead. > MSR_IA32_INT_SSP_TAB is not managed by XSAVE, so it is intercepted. > > Note, this MSR design introduced an architectural limitation of SHSTK and > IBT control for guest, i.e., when SHSTK is exposed, IBT is also available > to guest from architectural perspective since IBT relies on subset of SHSTK > relevant MSRs. > > Suggested-by: Sean Christopherson > Signed-off-by: Yang Weijiang > Tested-by: Mathias Krause > Tested-by: John Allen > Tested-by: Rick Edgecombe > Signed-off-by: Chao Gao > Signed-off-by: Sean Christopherson Reviewed-by: Xin Li (Intel) > --- > arch/x86/kvm/vmx/vmx.c | 19 +++++++++++++++++++ > 1 file changed, 19 insertions(+) > > diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c > index 4fc1dbba2eb0..adf5af30e537 100644 > --- a/arch/x86/kvm/vmx/vmx.c > +++ b/arch/x86/kvm/vmx/vmx.c > @@ -4101,6 +4101,8 @@ void pt_update_intercept_for_msr(struct kvm_vcpu *vcpu) > > void vmx_recalc_msr_intercepts(struct kvm_vcpu *vcpu) > { > + bool intercept; > + > if (!cpu_has_vmx_msr_bitmap()) > return; > > @@ -4146,6 +4148,23 @@ void vmx_recalc_msr_intercepts(struct kvm_vcpu *vcpu) > vmx_set_intercept_for_msr(vcpu, MSR_IA32_FLUSH_CMD, MSR_TYPE_W, > !guest_cpu_cap_has(vcpu, X86_FEATURE_FLUSH_L1D)); > > + if (kvm_cpu_cap_has(X86_FEATURE_SHSTK)) { > + intercept = !guest_cpu_cap_has(vcpu, X86_FEATURE_SHSTK); > + > + vmx_set_intercept_for_msr(vcpu, MSR_IA32_PL0_SSP, MSR_TYPE_RW, intercept); As you suggested, this is also the correct interception setting for FRED. Thanks! Xin