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[103.229.16.4]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-31c30067a55sm1502877a91.14.2025.07.09.02.16.04 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 09 Jul 2025 02:16:10 -0700 (PDT) Message-ID: Date: Wed, 9 Jul 2025 17:16:02 +0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 7/8] drm/msm/dp: Retry Link Training 2 with lower pattern To: Konrad Dybcio , Dmitry Baryshkov , dmitry.baryshkov@oss.qualcomm.com Cc: Rob Clark , Abhinav Kumar , Sean Paul , Marijn Suijten , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Kuogee Hsieh , Vinod Koul , Kishon Vijay Abraham I , Linus Walleij , Bartosz Golaszewski , quic_lliu6@quicinc.com, quic_fangez@quicinc.com, linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-gpio@vger.kernel.org, quic_xiangxuy@quicinc.com References: <20241129-add-displayport-support-for-qcs615-platform-v1-0-09a4338d93ef@quicinc.com> <20241129-add-displayport-support-for-qcs615-platform-v1-7-09a4338d93ef@quicinc.com> From: Xiangxu Yin In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNzA5MDA4MyBTYWx0ZWRfX4cWFtKOIVK7b 2LiSjB5c8tbPKceZ1h3ZJrLsY1N1a6WaygU23JQ6f0DAm8xUCkY2jwNDO/hhW+XGr8/Y5ILhcd4 1TY5QGPyvYRhuXZS4X3Recs2TMuRlJ+oD6UVoFPOZcfN2pCMIM5i1YbbDT6NQSMs4U+69RRShj4 mpMjdHUvP5gMT/gS35Ee+NTTsMnK1A60PaLQWJo3GvaT4XDRgMxaxU/1I/0J/Z3Pt8DuGQxEY7X kH8ic4ecvACpIdrCVVlRCI1KYWQktMOF+UItR8f7KAQS2OZ2A+NYT95ENiK85WTtqFOSC/wQTfi uaYkeR4RDj22CgIFn7i/FUO6Qb0TUne0jpzXMhuNzhvKzQRH48vbM7fVSJZ4Ifhk54nNLp97Llq b6jUn9LK3LxcpCKMFegOoNTVPcikqR1bVICUJ1PKIlFh+AxmNk1HRc5EEZWUG07+DJjmpBuZ X-Authority-Analysis: v=2.4 cv=QM1oRhLL c=1 sm=1 tr=0 ts=686e335c cx=c_pps a=UNFcQwm+pnOIJct1K4W+Mw==:117 a=nuhDOHQX5FNHPW3J6Bj6AA==:17 a=IkcTkHD0fZMA:10 a=Wb1JkmetP80A:10 a=COk6AnOGAAAA:8 a=M9roUVu_bSbsc9sLP4sA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=uKXjsCUrEbL0IQVhDsJ9:22 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-ORIG-GUID: Nb4oiiN6BfbwSp-M1KxfJs9fy_AH9sH2 X-Proofpoint-GUID: Nb4oiiN6BfbwSp-M1KxfJs9fy_AH9sH2 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.7,FMLib:17.12.80.40 definitions=2025-07-09_02,2025-07-08_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 impostorscore=0 malwarescore=0 suspectscore=0 lowpriorityscore=0 priorityscore=1501 bulkscore=0 adultscore=0 mlxscore=0 phishscore=0 mlxlogscore=999 spamscore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2505280000 definitions=main-2507090083 On 5/28/2025 4:49 AM, Konrad Dybcio wrote: > On 12/3/24 3:07 PM, Dmitry Baryshkov wrote: >> On Tue, Dec 03, 2024 at 04:13:22PM +0800, Xiangxu Yin wrote: >>> >>> >>> On 11/29/2024 9:53 PM, Dmitry Baryshkov wrote: >>>> On Fri, 29 Nov 2024 at 09:59, Xiangxu Yin wrote: >>>>> >>>>> Add a mechanism to retry Link Training 2 by lowering the pattern level >>>>> when the link training #2 first attempt fails. This approach enhances >>>>> compatibility, particularly addressing issues caused by certain hub >>>>> configurations. >>>> >>>> Please reference corresponding part of the standard, describing this lowering. >>>> >>> Per DisplayPort 1.4a specification Section 3.5.1.2 and Table 3-10, while the standard doesn't explicitly define a TPS downgrade mechanism, it does specify: >> >> Anything in DP 2.1? >> In the DP 2.1 spec, mainly on section '3.6.7.2 8b/10b DP Link Layer LTTPR Link Training Mandates', defined 'LTTPR shall support TPS4'. The other parts seems similar to the 1.4 spec. >>> - All devices shall support TPS1 and TPS2 >>> - HDR2-capable devices shall support TPS3 >>> - HDR3-capable devices shall support TPS4 >>> While these capabilities are explicitly defined DPCD for sink devices, source device capabilities are less strictly defined, with the minimum requirement being support for TPS1 and TPS2. >>> In QCS615 DP phy is only supporting to HBR2, we observed a critical interoperability scenario with a DP->HDMI bridge. When link training at TPS4 consistently failed, downgrading to the next lower training pattern successfully established the link and display output successfully. >> >> Any other driver doing such TPS lowering? Or maybe we should be >> selecting TPS3 for HBR2-only devices? > This logic is porting from qualcomm downstream, For other device, only found in some older Tx chips like i915（intel_dp_training_pattern) used the maximum hardware-supported patterns, but not lowering. According to the description in DPCD table 2-232 003h, From the DP spec perspective, it appears that all supported cases should preferably adopt TPS4, as it is more robust. 'DPRXs should support TPS4 and set this bit, regardless of whether the DPRX supports HBR3 because TPS4 is more conducive to robust link establishment than TPS2 and TPS3. 0 = TPS4 is not supported. 1 = TPS4 is supported (shall be supported for downstream devices with DPCD r1.4, except for eDPRXs).' Although maximum capability of QCS615 is HBR2, but the actual pattern supports TPS4. >From pure design perspective, it would be cleaner to drop this lowering in next patch. > Bump, this patch looks interesting and I'd like to see it revisited if > it's correct > > Konrad