From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1A40B28506A; Tue, 13 Jan 2026 14:59:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.153.233 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768316397; cv=none; b=u4LCdExVQQrIHTvbWJju+maLZy1xN9SXYw9rfBbYJF4JSi5xV/rjkqXvamDw2zfyUpLYo8hYewbqIUIBDj8PeV8pQUpIcyI1YkwlnIegrB7+9r+/uOI+zFcs18S31/JzX1ySuw8Si8Oab5cTabzXr0lMuCP5XgBjNVOORJ3sLtA= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768316397; c=relaxed/simple; bh=jC2AsUFaWKrDJEStofCk0XWXz8JM2i3DMt8adlwoSOo=; h=Message-ID:Date:MIME-Version:Subject:To:CC:References:From: In-Reply-To:Content-Type; b=rAZrI1yKu5cce+Qk8q0Ptp8eGT1oei24ed2ZWKd1mOX2dg3WpP8Zmd5Nvv5xOWwn+Oq6zRezYcY8/UF5MEUtqmqta3RpwHgEvw3zQ71stclwL2Hog6k4RxD2Bvgd62+7oytMVD65S3EZffH5t9Vpql/+x3TF/QGEqHdmf4jhD3Q= ARC-Authentication-Results:i=1; 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X-CSE-ConnectionGUID: sRFtzLONRu6S+I4SjuArAw== X-CSE-MsgGUID: VUqyUxX7Sb2mCTacvPGjBA== X-IronPort-AV: E=Sophos;i="6.21,222,1763449200"; d="scan'208";a="283174523" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa5.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Jan 2026 07:59:54 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.87.151) by chn-vm-ex1.mchp-main.com (10.10.87.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.2.2562.29; Tue, 13 Jan 2026 07:59:51 -0700 Received: from [10.159.205.69] (10.10.85.11) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.58 via Frontend Transport; Tue, 13 Jan 2026 07:59:47 -0700 Message-ID: Date: Tue, 13 Jan 2026 15:59:47 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 4/5] ARM: dts: microchip: sam9x7: Add GFX2D GPU To: Cyrille Pitchen , David Airlie , Simona Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alexandre Belloni , Claudiu Beznea , Russell King CC: , , , References: <20260113-cpitchen-mainline_gfx2d-v5-0-9cdab8fa699b@microchip.com> <20260113-cpitchen-mainline_gfx2d-v5-4-9cdab8fa699b@microchip.com> From: Nicolas Ferre Content-Language: en-US, fr Organization: microchip In-Reply-To: <20260113-cpitchen-mainline_gfx2d-v5-4-9cdab8fa699b@microchip.com> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit Hi, On 13/01/2026 at 14:10, Cyrille Pitchen wrote: > Add support for the GFX2D GPU. > > Signed-off-by: Cyrille Pitchen > --- > arch/arm/boot/dts/microchip/sam9x7.dtsi | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/arch/arm/boot/dts/microchip/sam9x7.dtsi b/arch/arm/boot/dts/microchip/sam9x7.dtsi > index 46dacbbd201ddb68a7456d6fe1afafa59db90ec8..79a82962264f51c4c243530b9dad9010f8cf1347 100644 > --- a/arch/arm/boot/dts/microchip/sam9x7.dtsi > +++ b/arch/arm/boot/dts/microchip/sam9x7.dtsi > @@ -292,6 +292,14 @@ AT91_XDMAC_DT_PERID(26))>, > status = "disabled"; > }; > > + gpu: gpu@f0018000 { > + compatible = "microchip,sam9x7-gfx2d"; > + reg = <0xf0018000 0x4000>; I see that the register map is much smaller that this 0x4000 size required. > + interrupts = <36 IRQ_TYPE_LEVEL_HIGH 0>; > + clocks = <&pmc PMC_TYPE_PERIPHERAL 36>; > + status = "disabled"; > + }; > + > i2s: i2s@f001c000 { > compatible = "microchip,sam9x7-i2smcc", "microchip,sam9x60-i2smcc"; > reg = <0xf001c000 0x100>; > Best regards, Nicolas