From: Bo Gan <ganboing@gmail.com>
To: zong.li@sifive.com, linux-clk@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org
Cc: Pragnesh.patel@sifive.com, aou@eecs.berkeley.edu,
erik.danie@sifive.com, hes@sifive.com, mturquette@baylibre.com,
palmer@dabbelt.com, palmerdabbelt@google.com,
paul.walmsley@sifive.com, pragnesh.patel@openfive.com,
sboyd@kernel.org, schwab@linux-m68k.org, yash.shah@sifive.com
Subject: [PATCH 1/3] dt-bindings: reset: sifive: add fu540/fu740 reset indexes
Date: Tue, 27 Aug 2024 23:55:18 -0700 [thread overview]
Message-ID: <d4e3c23469fbddb6904b857e9d262d86aecbd880.1724827635.git.ganboing@gmail.com> (raw)
In-Reply-To: <cover.1724827635.git.ganboing@gmail.com>
Add bindings for FU540/FU740 clock/reset controller. The header is taken
from the same path in U-Boot with macros renamed to have FU540/740 prefix.
Signed-off-by: Bo Gan <ganboing@gmail.com>
---
include/dt-bindings/reset/sifive-fu540-prci.h | 19 +++++++++++++++++++
include/dt-bindings/reset/sifive-fu740-prci.h | 19 +++++++++++++++++++
2 files changed, 38 insertions(+)
create mode 100644 include/dt-bindings/reset/sifive-fu540-prci.h
create mode 100644 include/dt-bindings/reset/sifive-fu740-prci.h
diff --git a/include/dt-bindings/reset/sifive-fu540-prci.h b/include/dt-bindings/reset/sifive-fu540-prci.h
new file mode 100644
index 000000000000..dbaf602262d2
--- /dev/null
+++ b/include/dt-bindings/reset/sifive-fu540-prci.h
@@ -0,0 +1,19 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2020 Sifive, Inc.
+ * Author: Sagar Kadam <sagar.kadam@sifive.com>
+ */
+
+#ifndef __DT_BINDINGS_RESET_SIFIVE_FU540_PRCI_H
+#define __DT_BINDINGS_RESET_SIFIVE_FU540_PRCI_H
+
+/* Reset indexes for use by device tree data and the PRCI driver */
+#define FU540_PRCI_RST_DDR_CTRL_N 0
+#define FU540_PRCI_RST_DDR_AXI_N 1
+#define FU540_PRCI_RST_DDR_AHB_N 2
+#define FU540_PRCI_RST_DDR_PHY_N 3
+/* bit 4 is reserved bit */
+#define FU540_PRCI_RST_RSVD_N 4
+#define FU540_PRCI_RST_GEMGXL_N 5
+
+#endif
diff --git a/include/dt-bindings/reset/sifive-fu740-prci.h b/include/dt-bindings/reset/sifive-fu740-prci.h
new file mode 100644
index 000000000000..74d60ca9f1df
--- /dev/null
+++ b/include/dt-bindings/reset/sifive-fu740-prci.h
@@ -0,0 +1,19 @@
+/* SPDX-License-Identifier: GPL-2.0 OR MIT */
+/*
+ * Copyright (C) 2020-2021 Sifive, Inc.
+ * Author: Pragnesh Patel <pragnesh.patel@sifive.com>
+ */
+
+#ifndef __DT_BINDINGS_RESET_SIFIVE_FU740_PRCI_H
+#define __DT_BINDINGS_RESET_SIFIVE_FU740_PRCI_H
+
+/* Reset indexes for use by device tree data and the PRCI driver */
+#define FU740_PRCI_RST_DDR_CTRL_N 0
+#define FU740_PRCI_RST_DDR_AXI_N 1
+#define FU740_PRCI_RST_DDR_AHB_N 2
+#define FU740_PRCI_RST_DDR_PHY_N 3
+#define FU740_PRCI_RST_PCIE_POWER_UP_N 4
+#define FU740_PRCI_RST_GEMGXL_N 5
+#define FU740_PRCI_RST_CLTX_N 6
+
+#endif
--
2.34.1
next prev parent reply other threads:[~2024-08-28 6:55 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-08-28 6:55 [PATCH 0/3] clk: sifive: Fix chip hang when booting linux directly Bo Gan
2024-08-28 6:55 ` Bo Gan [this message]
2024-08-29 5:56 ` [PATCH 1/3] dt-bindings: reset: sifive: add fu540/fu740 reset indexes Krzysztof Kozlowski
2024-08-28 6:55 ` [PATCH 2/3] riscv: dts: sifive: fu740: Use reset index from header Bo Gan
2024-08-28 6:55 ` [PATCH 3/3] clk: sifive: prci: Add release_reset hooks for gemgxlpll/cltxpll Bo Gan
2024-08-28 7:58 ` Conor Dooley
2024-08-28 8:14 ` Bo Gan
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