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Received: from IA6PR12MB893085.namprd12.prod.outlook.com (2603:10b6:208:601::18) by IA1PR12MB6650.namprd12.prod.outlook.com (2603:10b6:208:3a1::18) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.21.592.9; Wed, 4 Nov 2026 15:58:30 +0000 Received: from IA6PR12MB893085.namprd12.prod.outlook.com ([fe80::3f4e:1f38:3db2:270a]) by IA6PR12MB893085.namprd12.prod.outlook.com ([fe80::3f4e:1f38:3db2:270a%5]) with mapi id 15.21.0592.007; Wed, 4 Nov 2026 15:58:28 +0000 Message-ID: Date: Wed, 4 Nov 2026 10:58:26 -0500 User-Agent: Mozilla Thunderbird From: Harry Wentland Subject: Re: [PATCH v2 0/2] drm/amd/display: Keep FreeSync flip timing across plane resets To: davidralphhughes@gmail.com Cc: Leo Li , Rodrigo Siqueira , Alex Deucher , =?UTF-8?Q?Christian_K=C3=B6nig?= , David Airlie , Simona Vetter , Nicholas Kazlauskas , amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, stable@vger.kernel.org References: <20261028-freesync-plane-reset-time-v2-0-545a0f9b17df@gmail.com> Content-Language: en-US In-Reply-To: <20261028-freesync-plane-reset-time-v2-0-545a0f9b17df@gmail.com> Content-Type: text/plain; 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That grid drifts upward at the rate expected if FreeSync takes > the 32-bit microsecond timestamp itself as the last render time (3.46 > us/s measured, 3.45 predicted). > > KWin replaces the CRTC GAMMA_LUT blob on every commit in that mode, so > every flip resets the plane and the new DC plane starts with zeroed > flip timing. Patch 1 carries the timing over from the old DC plane, as > DM already does for flip_addr > (amdgpu_dm_plane_drm_plane_duplicate_state()) and for the BTR state > itself (dm_irq_params.vrr_params). Patch 2 adds KUnit tests, kept > separate so patch 1 backports to stable trees without the KUnit > infrastructure. > > Tested with KUnit (UML, all AMD display suites pass; the new timing > tests fail without the fix) and on 7.2.11 with a Navi 31, an AW3423DWF > over DP, KWin 6.8.1 and Mesa 26.2.5: 60 fps content now flips at a > steady 16.65 ms instead of on the 13.45 ms grid, 30 fps content still > gets BTR (30 fps, no 13.45 ms grid), and debugfs shows > color_mgmt_changed=1 on the CRTC in every sampled commit. Not tested: > DCE, overlay planes, other compositors. > > I am not sure of the current AI disclosure policy, but I will freely > mention that I used Claude Opus 5.5 to help debug and write this patch + > tests. I have tried to do my best to match existing style/procedures. > Series is Reviewed-by: Harry Wentland Harry > --- > Changes in v2: > - Copy the flip timing in amdgpu_dm_commit_planes() instead of in > atomic check, so it can't race with the previous commit still writing > it (reported by Sashiko AI review) > - Skip the copy when the plane keeps its DC plane > - Add dm_plane_inherit_flip_time() in patch 1; patch 2 only exposes it > to KUnit > - Check the whole flip timing struct in the KUnit tests > - Link to v1: https://patch.msgid.link/20261027-freesync-plane-reset-time-v1-0-bb43b501faf4@gmail.com > > --- > Davey Hughes (2): > drm/amd/display: Keep FreeSync flip timing across plane resets > drm/amd/display: Test FreeSync flip timing across plane resets > > drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 23 +++ > drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 3 + > .../amd/display/amdgpu_dm/tests/amdgpu_dm_test.c | 188 +++++++++++++++++++++ > 3 files changed, 214 insertions(+) > --- > base-commit: 77f548b127c6de34ce271fa09ba270cb1ef9f2da > change-id: 20261027-freesync-plane-reset-time-5db657eebfde > > Best regards, > -- > Davey Hughes