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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-bcd9decf173sm244707866b.43.2026.05.11.03.29.11 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 11 May 2026 03:29:12 -0700 (PDT) Message-ID: Date: Mon, 11 May 2026 12:29:10 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] PCI: qcom: Handle mixed PERST#/PHY DT configuration To: Qiang Yu , Manivannan Sadhasivam , Lorenzo Pieralisi , =?UTF-8?Q?Krzysztof_Wilczy=C5=84ski?= , Rob Herring , Bjorn Helgaas Cc: linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Manivannan Sadhasivam References: <20260508-mix_perst_phy_dts-v1-1-9eff6ee9b51a@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20260508-mix_perst_phy_dts-v1-1-9eff6ee9b51a@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Authority-Analysis: v=2.4 cv=EaT4hvmC c=1 sm=1 tr=0 ts=6a01afb6 cx=c_pps a=JIY1xp/sjQ9K5JH4t62bdg==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=NGcC8JguVDcA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_K5XuSEh1TEqbUxoQ0s3:22 a=EUspDBNiAAAA:8 a=-fIsIiFNM88_Lyffzp4A:9 a=QEXdDO2ut3YA:10 a=tNoRWFLymzeba-QzToBc:22 X-Proofpoint-GUID: N5T4-OeY7foApEtT_eL92EdIlcaoEjyp X-Proofpoint-ORIG-GUID: N5T4-OeY7foApEtT_eL92EdIlcaoEjyp X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNTExMDExNSBTYWx0ZWRfX0TLIlf0Urx+n o4Fz5MP682kFi7zOWo3BmFU9sqZ0eZHrecqsbO+U6uTdLAh9UjbdiBho9s/PMs8WL4ZJuoHN2pF AA2VOFokmF1jPZdFKyJxozQcMbkPk8qKbgcDpJXKhr+qjCgFboXkaKdr9RgRQUh5O9DuHWsTTnZ aaoDreNn2mDYOmslZH0sBs0/bBagn3TpwqByD+ElPHu3ItVOjMSwKQft6392y76RgfKrPLw1q2h m6q7kq4ns2t8Lyt6cxVhAWtIRNhwmOWjAMM2s8E3CLENGT88uMMLdByw9dG2EbH9SLpLndmCjgH q2P5PhLg+H1XfIVTNJXABp3XNx3ZdUJ+xEcl2e0kS+BfXSPAsBlmWqwmYNye9qb6D2h+/QXdXGp kIGNmWi7Sw6zC4AGKKs0q3ZVq18o8XMl/syc0AfzuPW4S8eplX548muV/UD9UfS6HE/x8PCFGmB DfUgQv0NSYoeldbB4vA== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-05-11_03,2026-05-08_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 suspectscore=0 lowpriorityscore=0 priorityscore=1501 phishscore=0 impostorscore=0 clxscore=1015 bulkscore=0 spamscore=0 adultscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2604200000 definitions=main-2605110115 On 5/8/26 11:54 AM, Qiang Yu wrote: > The driver currently supports two PERST# and PHY DT configuration. In one > case, PHY, PERST#, are described in the RC node. In the other case, they > are described in the RP node. > > A mixed setup is not supported. One common example is PHY on the RP node > while PERST# remains on the RC node. In that case the driver goes through > the RP parse path, does not find PERST# on RP, and does not report an > error because PERST# is optional. Probe can then succeed silently while > PERST# is left uncontrolled, and PCIe endpoints fails to work later. This > silent probe success makes debugging difficult. > > Handle this mixed case in the RP parse path by checking whether PERST# is > present on RC and, if so, using the RC PERST# GPIO for RP ports while > keeping RP parsing for PHY. Emit a warning to indicate mixed DT content so > it can be fixed. > > This keeps mixed systems functional and makes the configuration issue > visible instead of failing later at endpoint bring-up. > > Suggested-by: Manivannan Sadhasivam > Signed-off-by: Qiang Yu > --- > drivers/pci/controller/dwc/pcie-qcom.c | 15 +++++++++++++++ > 1 file changed, 15 insertions(+) > > diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c > index 9fdfc88ac151..8235961d692f 100644 > --- a/drivers/pci/controller/dwc/pcie-qcom.c > +++ b/drivers/pci/controller/dwc/pcie-qcom.c > @@ -282,6 +282,7 @@ struct qcom_pcie { > const struct qcom_pcie_cfg *cfg; > struct dentry *debugfs; > struct list_head ports; > + struct gpio_desc *reset; I'd rename this to make it more obvious it's at the RC node.. but rc_reset doesn't really sound great.. otherwise: Reviewed-by: Konrad Dybcio Konrad