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Tue, 09 Jun 2026 01:53:54 -0700 (PDT) Message-ID: Date: Tue, 9 Jun 2026 09:53:53 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 3/7] arm64: dts: qcom: shikra: Add CAMSS node To: Nihal Kumar Gupta , Bryan O'Donoghue , Vladimir Zapolskiy , Loic Poulain , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Robert Foss , Andi Shyti , Bjorn Andersson , Konrad Dybcio , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam Cc: linux-arm-msm@vger.kernel.org, linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-i2c@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, Suresh Vankadara , Vikram Sharma References: <20260608-shikra-camss-review-v2-0-ca1936bf1219@oss.qualcomm.com> <20260608-shikra-camss-review-v2-3-ca1936bf1219@oss.qualcomm.com> From: Bryan O'Donoghue Content-Language: en-US In-Reply-To: <20260608-shikra-camss-review-v2-3-ca1936bf1219@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 08/06/2026 15:06, Nihal Kumar Gupta wrote: > Add the Camera Subsystem node. Shikra shares the same IP as QCM2290 > with two CSIPHYs, two CSIDs and two VFEs, but does not include CDM > and OPE blocks, so only a single IOMMU context bank is needed. > > Co-developed-by: Vikram Sharma > Signed-off-by: Vikram Sharma > Signed-off-by: Nihal Kumar Gupta > --- > arch/arm64/boot/dts/qcom/shikra.dtsi | 99 ++++++++++++++++++++++++++++++++++++ > 1 file changed, 99 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/shikra.dtsi b/arch/arm64/boot/dts/qcom/shikra.dtsi > index a4334d99c1f35ee851ca8266ec37d4a200a07ee5..b93ce4a92a998ea5d9d4268d2fd46030fafc4084 100644 > --- a/arch/arm64/boot/dts/qcom/shikra.dtsi > +++ b/arch/arm64/boot/dts/qcom/shikra.dtsi > @@ -604,6 +604,105 @@ opp-384000000 { > }; > }; > > + camss: camss@5c11000 { > + compatible = "qcom,shikra-camss", "qcom,qcm2290-camss"; > + > + reg = <0x0 0x05c11000 0x0 0x1000>, > + <0x0 0x05c6e000 0x0 0x1000>, > + <0x0 0x05c75000 0x0 0x1000>, > + <0x0 0x05c52000 0x0 0x1000>, > + <0x0 0x05c53000 0x0 0x1000>, > + <0x0 0x05c66000 0x0 0x400>, > + <0x0 0x05c68000 0x0 0x400>, > + <0x0 0x05c6f000 0x0 0x4000>, > + <0x0 0x05c76000 0x0 0x4000>; > + reg-names = "top", > + "csid0", > + "csid1", > + "csiphy0", > + "csiphy1", > + "csitpg0", > + "csitpg1", > + "vfe0", > + "vfe1"; > + > + clocks = <&gcc GCC_CAMERA_AHB_CLK>, > + <&gcc GCC_CAMSS_AXI_CLK>, > + <&gcc GCC_CAMSS_NRT_AXI_CLK>, > + <&gcc GCC_CAMSS_RT_AXI_CLK>, > + <&gcc GCC_CAMSS_TFE_0_CSID_CLK>, > + <&gcc GCC_CAMSS_TFE_1_CSID_CLK>, > + <&gcc GCC_CAMSS_CPHY_0_CLK>, > + <&gcc GCC_CAMSS_CSI0PHYTIMER_CLK>, > + <&gcc GCC_CAMSS_CPHY_1_CLK>, > + <&gcc GCC_CAMSS_CSI1PHYTIMER_CLK>, > + <&gcc GCC_CAMSS_TOP_AHB_CLK>, > + <&gcc GCC_CAMSS_TFE_0_CLK>, > + <&gcc GCC_CAMSS_TFE_0_CPHY_RX_CLK>, > + <&gcc GCC_CAMSS_TFE_1_CLK>, > + <&gcc GCC_CAMSS_TFE_1_CPHY_RX_CLK>; > + clock-names = "ahb", > + "axi", > + "camnoc_nrt_axi", > + "camnoc_rt_axi", > + "csi0", > + "csi1", > + "csiphy0", > + "csiphy0_timer", > + "csiphy1", > + "csiphy1_timer", > + "top_ahb", > + "vfe0", > + "vfe0_cphy_rx", > + "vfe1", > + "vfe1_cphy_rx"; > + > + interrupts = , > + , > + , > + , > + , > + , > + , > + ; > + interrupt-names = "csid0", > + "csid1", > + "csiphy0", > + "csiphy1", > + "csitpg0", > + "csitpg1", > + "vfe0", > + "vfe1"; > + > + interconnects = <&mem_noc MASTER_AMPSS_M0 RPM_ACTIVE_TAG > + &config_noc SLAVE_CAMERA_CFG RPM_ACTIVE_TAG>, > + <&mmrt_virt MASTER_CAMNOC_HF RPM_ALWAYS_TAG > + &mc_virt SLAVE_EBI_CH0 RPM_ALWAYS_TAG>, > + <&mmnrt_virt MASTER_CAMNOC_SF RPM_ALWAYS_TAG > + &mc_virt SLAVE_EBI_CH0 RPM_ALWAYS_TAG>; > + interconnect-names = "ahb", > + "hf_mnoc", > + "sf_mnoc"; > + > + iommus = <&apps_smmu 0x400 0x0>; > + power-domains = <&gcc GCC_CAMSS_TOP_GDSC>; > + > + status = "disabled"; > + > + ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port@0 { > + reg = <0>; > + }; > + > + port@1 { > + reg = <1>; > + }; > + }; > + }; > + > qupv3_0: geniqup@4ac0000 { > compatible = "qcom,geni-se-qup"; > reg = <0x0 0x04ac0000 0x0 0x2000>; > Reviewed-by: Bryan O'Donoghue --- bod