From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5E200C4321E for ; Tue, 11 Oct 2022 22:12:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229600AbiJKWMC (ORCPT ); Tue, 11 Oct 2022 18:12:02 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42290 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229446AbiJKWL7 (ORCPT ); Tue, 11 Oct 2022 18:11:59 -0400 Received: from alexa-out-sd-01.qualcomm.com (alexa-out-sd-01.qualcomm.com [199.106.114.38]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id ECB119411F; Tue, 11 Oct 2022 15:11:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1665526319; x=1697062319; h=message-id:date:mime-version:subject:to:cc:references: from:in-reply-to:content-transfer-encoding; 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charset="UTF-8" Content-Transfer-Encoding: 7bit X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01b.na.qualcomm.com (10.46.141.250) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 10/3/2022 2:32 PM, Dmitry Baryshkov wrote: > On Mon, 3 Oct 2022 at 21:47, Melody Olvera wrote: >> >> On 10/1/2022 4:24 AM, Krzysztof Kozlowski wrote: >>> On 01/10/2022 05:03, Melody Olvera wrote: >>>> Add device tree bindings for global clock controller on QDU1000 and >>>> QRU1000 SoCs. >>>> >>>> Signed-off-by: Melody Olvera >>>> --- >>>> .../bindings/clock/qcom,gcc-qdru1000.yaml | 74 ++++++++ >>>> include/dt-bindings/clock/qcom,gcc-qdru1000.h | 170 ++++++++++++++++++ >>>> 2 files changed, 244 insertions(+) >>>> create mode 100644 Documentation/devicetree/bindings/clock/qcom,gcc-qdru1000.yaml >>>> create mode 100644 include/dt-bindings/clock/qcom,gcc-qdru1000.h >>>> >>>> diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-qdru1000.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-qdru1000.yaml >>>> new file mode 100644 >>>> index 000000000000..d92f558d547c >>>> --- /dev/null >>>> +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-qdru1000.yaml >>>> @@ -0,0 +1,74 @@ >>>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) >>>> +%YAML 1.2 >>>> +--- >>>> +$id: http://devicetree.org/schemas/clock/qcom,gcc-qdru.yaml# >>>> +$schema: http://devicetree.org/meta-schemas/core.yaml# >>>> + >>>> +title: Qualcomm Global Clock & Reset Controller Binding for QDU1000 and QRU1000 >>> Drop "Binding" >> Will do in v2. >> >>>> + >>>> +maintainers: >>>> + - Melody Olvera >>>> + >>>> +description: | >>>> + Qualcomm global clock control module which supports the clocks, resets and >>>> + power domains on QDU1000 and QRU1000 >>>> + >>>> + See also: >>>> + - dt-bindings/clock/qcom,gcc-qdru1000.h >>> Full path >> Understood. >>>> + >>>> +properties: >>>> + compatible: >>>> + enum: >>>> + - qcom,gcc-qdu1000 >>>> + - qcom,gcc-qru1000 >>>> + >>>> + clocks: >>>> + items: >>>> + - description: Board XO source >>>> + - description: Sleep clock source >>>> + - description: PCIE 0 Pipe clock source (Optional clock) >>> Skip "Optional clock" >>> >>>> + - description: PCIE 0 Phy Auxiliary clock source (Optional clock) >>>> + - description: USB3 Phy wrapper pipe clock source (Optional clock) >>>> + minItems: 2 >>>> + >>>> + clock-names: >>>> + items: >>>> + - const: bi_tcxo >>>> + - const: sleep_clk >>>> + - const: pcie_0_pipe_clk # Optional clock >>> Skip "Optional clock" >> Will remove all optional clock instances. > Drop the 'optional clock' words, not the clocks themselves. See > existing examples, which have optional clocks. > Ah apologies; I misunderstood. Thanks, Melody