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charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTIxMDEyNCBTYWx0ZWRfX4h8xSEhLczaq VCCyQ4G3vC0BPgVqWiPpu4PJui4B9Dg8j4BRyxKPO8R44RoUjADkA3FBxW8QbF80uSxCnjjtfQh UmCKi6OeAlm1zFelFCgSMxJGZzqtDWfL/kSY4D3oRy18VN7jFJRnRtS6GPeDm7Zw5EUNVMETMZR 7PttC4BrTogbGzD32ReIf9Lr9InVgHtC/VxVwXJr6UyegIl5/hnWfQiiuF1lcxttNOwwPA4SkQF tKlXGh356qW4SD+cRqwmZFtmbl6I54gyp3prOv+aznmiKrEGo/jdDRnPRk3nOoe7sXQhMXyF2r0 pDhQTVxppXU5j1oTpLIw5LpTE3+nU3vX8ksmiT5Zy/wXXDhB6FaCCdrriNPWE2doA8iopaopEGK HCEJJru4jm9BvhkXFBhkL42q6SBoPtEzs7jxP94XcnxLQ2toIOfG7um9MSonwmJ46VoLxB02nYZ NRlMibxNqbpFyySUlsg== X-Proofpoint-Spam-Info: AW1haW4tMjYwOTIxMDEyNCBTYWx0ZWRfX0pBEbsV52LWN 3FUWQasie5ij+WVemE6jWsJn3ooikhKK++nVaEb43IBgx3SeqgZ+EheJYGyDkJfJFdvXvwHbvZO 4m1v5FACQ+Z9bbOTV7Y92tfmXWfKR4g= X-Proofpoint-ORIG-GUID: wt_mT9GekQIoNE5reURbwv7UeyqteIFg X-Proofpoint-GUID: wt_mT9GekQIoNE5reURbwv7UeyqteIFg X-Authority-Analysis: v=2.4 cv=W7etxhWk c=1 sm=1 tr=0 ts=6ab0ed38 cx=c_pps a=qKBjSQ1v91RyAK45QCPf5w==:117 a=PRfkaYvzSr8QmIIGAkY2Sg==:17 a=IkcTkHD0fZMA:10 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=3WHJM1ZQz_JShphwDgj5:22 a=zKUMnf7IFlsw2KSWKZIA:9 a=QEXdDO2ut3YA:10 a=NFOGd7dJGGMPyQGDc5-O:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-21_03,2026-09-16_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 spamscore=0 malwarescore=0 suspectscore=0 bulkscore=0 impostorscore=0 priorityscore=1501 phishscore=0 lowpriorityscore=0 clxscore=1015 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2609210124 On 9/11/26 8:50 AM, Krishna Chaitanya Chundru wrote: > The Qualcomm PCIe host controller driver added support for parsing the > -power-on-us property[1] from each Root Port node and programming it as > art of host initialization (PCI: qcom: Program T_POWER_ON) [2]. Prior to > this, T_POWER_ON was expected to be programmed correctly in hardware or > by the bootloader, but not all targets support this, which can lead to an > incorrectly calculated LTR_L1.2_THRESHOLD in aspm.c and improper L1.2 exit > behavior. This is a good problem description. Does it have observable effects that could also be mentioned here, beyond perhaps lspci reporting an odd value? > This series adds the t-power-on-us = <80>; property to the PCIe root > port node(s) on the following targets, so the controller programs the > correct T_POWER_ON value instead of relying on the (currently incorrect) > hardware default: > > - kodiak > - lemans > - monaco > - hamoa > - glymur > - talos > - sm8750 > - kaanapali Because you said "currently incorrect", it clearly applies to all of these platforms. Are other ones that we support in the tree also affected? Konrad