From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-11.4 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,NICE_REPLY_A,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 10F77C2D0A3 for ; Mon, 9 Nov 2020 11:36:06 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 9FDF7206ED for ; Mon, 9 Nov 2020 11:36:05 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=st.com header.i=@st.com header.b="f90NrHL2" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729967AbgKILgE (ORCPT ); Mon, 9 Nov 2020 06:36:04 -0500 Received: from mx07-00178001.pphosted.com ([185.132.182.106]:50570 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729599AbgKILgB (ORCPT ); Mon, 9 Nov 2020 06:36:01 -0500 Received: from pps.filterd (m0046037.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 0A9BWVSo017770; Mon, 9 Nov 2020 12:35:52 +0100 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=st.com; h=subject : to : cc : references : from : message-id : date : mime-version : in-reply-to : content-type : content-transfer-encoding; s=STMicroelectronics; bh=nCNWMSseoOrn7wzGNsCWWTckovRM9wFGc2kDdfQ+cUs=; b=f90NrHL2mnjrDStKpnkfXF4Zaojh5QRoxku70I9abypNPmGqsHUpzAbzr+i1LgRuEug1 Gwr8aDSWAkKZQ3KaacHtVmmXc1W1xwrOgCmgNzZZ08ZvswzaGHRcYO7yXsnt7o6OQXMP gz2N7PY+qPKbDILLeilh1cCj0METSb+XlUI/zT99UXuLwyFaJAkDcCkuyIE0VjvStyCa Nb6bqAzBmlsOyYz/znJgXPaa3ieygjl6GoebBSNoOsED0oLBr9pkuYlBilrgv5/YXlhX gDoSvqLpAokpg/BZxWY1XPuyKbTKHROI+oKPDGkhwKFCABm0GWW2c1csfjKzNSYT7g+D 1A== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 34nj80hpjn-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 09 Nov 2020 12:35:52 +0100 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 198F610002A; Mon, 9 Nov 2020 12:35:52 +0100 (CET) Received: from Webmail-eu.st.com (sfhdag3node2.st.com [10.75.127.8]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 07FEE233859; Mon, 9 Nov 2020 12:35:52 +0100 (CET) Received: from lmecxl0912.lme.st.com (10.75.127.46) by SFHDAG3NODE2.st.com (10.75.127.8) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Mon, 9 Nov 2020 12:35:51 +0100 Subject: Re: [PATCH] ARM: dts: stm32: reorder spi4 within stm32mp15-pinctrl To: Patrick Delaunay , CC: Manivannan Sadhasivam , Maxime Coquelin , Rob Herring , , , References: <20201022173851.20114-1-patrick.delaunay@st.com> From: Alexandre Torgue Message-ID: Date: Mon, 9 Nov 2020 12:35:09 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: <20201022173851.20114-1-patrick.delaunay@st.com> Content-Type: text/plain; charset="utf-8"; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit X-Originating-IP: [10.75.127.46] X-ClientProxiedBy: SFHDAG4NODE2.st.com (10.75.127.11) To SFHDAG3NODE2.st.com (10.75.127.8) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.312,18.0.737 definitions=2020-11-09_02:2020-11-05,2020-11-09 signatures=0 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Patrick On 10/22/20 7:38 PM, Patrick Delaunay wrote: > Move spi4 at the right alphabetical place within stm32mp15-pinctrl > > Fixes: 4fe663890ac5 ("ARM: dts: stm32: Fix spi4 pins in stm32mp15-pinctrl") > Signed-off-by: Patrick Delaunay > --- > > arch/arm/boot/dts/stm32mp15-pinctrl.dtsi | 28 ++++++++++++------------ > 1 file changed, 14 insertions(+), 14 deletions(-) > > diff --git a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi > index d84686e00370..c9e514165672 100644 > --- a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi > +++ b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi > @@ -1591,6 +1591,20 @@ > }; > }; > Applied on stm32-next. Thanks. Alex > + spi4_pins_a: spi4-0 { > + pins { > + pinmux = , /* SPI4_SCK */ > + ; /* SPI4_MOSI */ > + bias-disable; > + drive-push-pull; > + slew-rate = <1>; > + }; > + pins2 { > + pinmux = ; /* SPI4_MISO */ > + bias-disable; > + }; > + }; > + > uart4_pins_a: uart4-0 { > pins1 { > pinmux = ; /* UART4_TX */ > @@ -1726,20 +1740,6 @@ > }; > }; > > - spi4_pins_a: spi4-0 { > - pins { > - pinmux = , /* SPI4_SCK */ > - ; /* SPI4_MOSI */ > - bias-disable; > - drive-push-pull; > - slew-rate = <1>; > - }; > - pins2 { > - pinmux = ; /* SPI4_MISO */ > - bias-disable; > - }; > - }; > - > usart2_pins_a: usart2-0 { > pins1 { > pinmux = , /* USART2_TX */ >