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[103.229.16.4]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-3ab39238608sm16102673a91.17.2026.10.12.01.41.23 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 12 Oct 2026 01:41:29 -0700 (PDT) Message-ID: Date: Mon, 12 Oct 2026 16:41:21 +0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 3/3] arm64: dts: qcom: Add INT2 GDSC to Kaanapali DPU To: Dmitry Baryshkov Cc: Rob Clark , Dmitry Baryshkov , Abhinav Kumar , Jessica Zhang , Sean Paul , Marijn Suijten , David Airlie , Simona Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Krishna Manikandan , Abel Vesa , Yuanjie Yang , Bjorn Andersson , Konrad Dybcio , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20260915-msm_gdsc2-v2-0-9157237b8382@oss.qualcomm.com> <20260915-msm_gdsc2-v2-3-9157237b8382@oss.qualcomm.com> Content-Language: en-US From: Yongxing Mou In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMDEyMDAzNCBTYWx0ZWRfX42fZyPL+1rZP RnVxid23Fe5WpQzrl/gzfI8fdIgTtSuLWCPd/ZAiXGRZhung2gwbKqPbJ1An5xcTD4e9GwSnJnC cOBSxNCPC+70yUclCK1tAOqdVnGZlV5+UCMe1W5Nw+uNOC1fnEoCd0EuzEZSGdocHZEep3V6MLS gpNPU1HsG9vhKZBcVorxpT3tpP0jb4RC7eXkSMM/xuWaxHt5LK+dWniiOeZMoSVZs36c9Z1TUnW PFaMCblwgxW248nCu/3MkYyeHxS+Vg7NuryyvQ6pbNreS4PKguXZlhG2bodanwhUB/q6PP8xyQl KCTVq2n7mS+SY4LwNWs55FxrZH79FttcmFgyH8rq47Y5NS9+Vkh94RIcjLPAPL1rRuCnJTVkMJX zHW3+aZO8aV3V8/G8CgNbm5/koJlm7xkDoudtiMnGB/J+bFf8kpb2wK8dmx6CX1cCUTCPJSvlid fyNCrxC5osfgApuYqxg== X-Proofpoint-Spam-Info: AW1haW4tMjYxMDEyMDAzNCBTYWx0ZWRfXzXVtcaTRtKaK ZY73LAQ+cn7C0Rug2ygXi3DQqIr0Uv7he4sjl0Q4eQgaA2cQG0j5pIJckeKDp8/9uXSM9radBsM kzp3+wQH+TO+GtSyeM3SbZ185m7bbBM= X-Authority-Analysis: v=2.4 cv=VOtIDNPX c=1 sm=1 tr=0 ts=6acc9d3b cx=c_pps a=RP+M6JBNLl+fLTcSJhASfg==:117 a=nuhDOHQX5FNHPW3J6Bj6AA==:17 a=IkcTkHD0fZMA:10 a=660iZSQnnn4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=YMgV9FUhrdKAYTUUvYB2:22 a=EUspDBNiAAAA:8 a=qfM8fCPi6zIbc8DzE_UA:9 a=QEXdDO2ut3YA:10 a=iS9zxrgQBfv6-_F4QbHw:22 X-Proofpoint-GUID: KWq06eqeu_XoB91rs72qNV6J632adbkV X-Proofpoint-ORIG-GUID: KWq06eqeu_XoB91rs72qNV6J632adbkV X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-10-12_03,2026-10-09_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 adultscore=0 clxscore=1015 bulkscore=0 phishscore=0 spamscore=0 suspectscore=0 priorityscore=1501 impostorscore=0 lowpriorityscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2610080000 definitions=main-2610120034 On 10/5/2026 9:06 AM, Dmitry Baryshkov wrote: > On Tue, Sep 15, 2026 at 05:27:50PM +0800, Yongxing Mou wrote: >> The INT2 GDSC on Kaanapali (SM8850) powers a subset of the DPU >> source pipes (VIG2/VIG3/DMA5). Add it as a second power domain of >> the display-controller (DPU) node, alongside the existing MMCX >> performance-state power domain. >> >> The MDSS node's CORE_GDSC is unaffected, since it continues to power >> the rest of the MDSS hardware on its own. >> >> Signed-off-by: Yongxing Mou >> --- >> arch/arm64/boot/dts/qcom/kaanapali.dtsi | 4 +++- >> 1 file changed, 3 insertions(+), 1 deletion(-) >> >> diff --git a/arch/arm64/boot/dts/qcom/kaanapali.dtsi b/arch/arm64/boot/dts/qcom/kaanapali.dtsi >> index ace19b8b12d7..b3e3cd1d311c 100644 >> --- a/arch/arm64/boot/dts/qcom/kaanapali.dtsi >> +++ b/arch/arm64/boot/dts/qcom/kaanapali.dtsi >> @@ -3619,7 +3619,9 @@ mdss_mdp: display-controller@9801000 { >> >> operating-points-v2 = <&mdp_opp_table>; >> >> - power-domains = <&rpmhpd RPMHPD_MMCX>; >> + power-domains = <&rpmhpd RPMHPD_MMCX>, > > Should it continue to be RPMHPD_MMCX or should it become > DISP_CC_MDSS_CORE_GDSC? > It should remain RPMHPD_MMCX, as this power domain is used by the DPU OPP table for performance-state voting. DISP_CC_MDSS_CORE_GDSC remains attached to the parent MDSS device because it supplies hardware shared across the MDSS subsystem. Since the DPU is a child of MDSS, it inherits access to this power domain through the parent-child runtime PM hierarchy. Only INT2 is attached directly to the DPU, as it exclusively powers a subset of the DPU source pipes. >> + <&dispcc DISP_CC_MDSS_CORE_INT2_GDSC>; >> + power-domain-names = "mmcx", "int2"; >> >> ports { >> #address-cells = <1>; >> >> -- >> 2.43.0 >> >