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[89.77.68.124]) by smtp.gmail.com with ESMTPSA id x11sm142447lfr.171.2021.12.18.02.59.26 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sat, 18 Dec 2021 02:59:26 -0800 (PST) Message-ID: Date: Sat, 18 Dec 2021 11:59:26 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.3.1 Subject: Re: [PATCH 2/5] dt-bindings: memory: Add Tegra210 memory controller bindings Content-Language: en-US To: Thierry Reding , Rob Herring Cc: Jon Hunter , devicetree@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org References: <20211217165919.2700920-1-thierry.reding@gmail.com> <20211217165919.2700920-2-thierry.reding@gmail.com> From: Krzysztof Kozlowski In-Reply-To: <20211217165919.2700920-2-thierry.reding@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 17/12/2021 17:59, Thierry Reding wrote: > From: Thierry Reding > > Document the bindings for the memory controller found on Tegra210 SoCs. > > Signed-off-by: Thierry Reding > --- > .../nvidia,tegra210-mc.yaml | 77 +++++++++++++++++++ > 1 file changed, 77 insertions(+) > create mode 100644 Documentation/devicetree/bindings/memory-controllers/nvidia,tegra210-mc.yaml > > diff --git a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra210-mc.yaml b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra210-mc.yaml > new file mode 100644 > index 000000000000..ef21c11052e3 > --- /dev/null > +++ b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra210-mc.yaml > @@ -0,0 +1,77 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/memory-controllers/nvidia,tegra210-mc.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: NVIDIA Tegra210 SoC Memory Controller > + > +maintainers: > + - Thierry Reding > + - Jon Hunter > + > +description: | > + The NVIDIA Tegra210 SoC features a 64 bit memory controller that is split into two 32 bit > + channels to support LPDDR3 and LPDDR4 with x16 subpartitions. The MC handles memory requests for > + 34-bit virtual addresses from internal clients and arbitrates among them to allocate memory > + bandwidth. > + > + Up to 8 GiB of physical memory can be supported. Security features such as encryption of traffic > + to and from DRAM via general security apertures are available for video and other secure > + applications. > + > +properties: > + $nodename: > + pattern: "^memory-controller@[0-9a-f]+$" > + > + compatible: > + items: > + - enum: > + - nvidia,tegra210-mc > + > + reg: > + maxItems: 1 > + > + interrupts: > + maxItems: 1 > + > + clocks: > + items: > + - description: module clock > + > + clock-names: > + items: > + - const: mc > + > + "#iommu-cells": > + const: 1 > + > + "#reset-cells": > + const: 1 > + > +required: > + - compatible > + - reg > + - interrupts > + - clocks > + - clock-names > + - "#iommu-cells" > + - "#reset-cells" > + > +additionalProperties: false > + > +examples: > + - | > + #include > + #include > + > + mc: memory-controller@70019000 { If there is going to be resubmit, please skip the alias. It just adds noise. Without resubmit, I can fix it when applying. Best regards, Krzysztof