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Mon, 06 Jul 2026 01:28:19 -0700 (PDT) X-Received: by 2002:a05:620a:2983:b0:92e:5ef1:9072 with SMTP id af79cd13be357-92e99f6b749mr838789085a.2.1783326498940; Mon, 06 Jul 2026 01:28:18 -0700 (PDT) Received: from [192.168.120.193] ([178.235.128.140]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-c12b60575c4sm692575666b.9.2026.07.06.01.28.16 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 06 Jul 2026 01:28:17 -0700 (PDT) Message-ID: Date: Mon, 6 Jul 2026 10:28:16 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/3] arm64: dts: qcom: eliza-evk: Add PCIe1 with TC9563 PCIe switch To: Krishna Chaitanya Chundru , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Manivannan Sadhasivam , Bartosz Golaszewski Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, linux-pm@vger.kernel.org References: <20260703-eliza_evk-v1-0-7624440bd76d@oss.qualcomm.com> <20260703-eliza_evk-v1-2-7624440bd76d@oss.qualcomm.com> <7ce4844c-8025-48e5-a1fc-4d1cf9f7917d@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Info: AW1haW4tMjYwNzA2MDA4MyBTYWx0ZWRfX9wow5M8FmLQQ sDexLklRhnplP1cmAswaXGpyFbTlSuCphEqDrAQ5nJRA5IQ/KuFgey08oC5fZ+2SwBaYQh9SMfo dlhoX5CcICv5fWnyEIgqolkU9TkNW5A= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNzA2MDA4MyBTYWx0ZWRfX2mNE7wpCF7Id tnDFpCO2vkbjuRA9ynUHlp/nttQ+y+hw7dE6Y3QtGO0hVvb+FfhEMJuA58LkaQqffw4a73Aubkd sx6gIRl3kj9Ak+zncGLlmHsM14z6jRjlKOaqI8SffAwqyAigkJ0U+2VQMSx+yL6wsjYRDIGQOpV B3avpLbbnR5rFen/q0rmzNI49IWvdUmDTD8KPRYfWg3DHmdp6EeH3dRtBkdXCW0dzeV43vtedKI tQk5ozYWB8g2lo8v04PN67b8FL1OvhkqR4QKxfA7LALVz+mDV6bqH7KvtwKWnwxrn59lVwTDgBW lUJAqbJ5fppNRPcEQiyW3mzTSWz/8eS0qWoAiCELnzncgWHS03lAZNAAGp+KTuuZCvD6fBRCqNj 9MkNCZfnvdaxG7UlC70ntbznbL2vnZxrizvTiImPahGzy34QzxtCWCii+fAP1MCLqe5wwsrdijV grhQ62YymnrahnQ9Fkw== X-Proofpoint-GUID: zpTJSx_eQVvxpF7kGf7iPHwBQonqm3QY X-Proofpoint-ORIG-GUID: zpTJSx_eQVvxpF7kGf7iPHwBQonqm3QY X-Authority-Analysis: v=2.4 cv=b9GCJNGx c=1 sm=1 tr=0 ts=6a4b6725 cx=c_pps a=qKBjSQ1v91RyAK45QCPf5w==:117 a=PRfkaYvzSr8QmIIGAkY2Sg==:17 a=IkcTkHD0fZMA:10 a=RAioF0-LDSMA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yOCtJkima9RkubShWh1s:22 a=EUspDBNiAAAA:8 a=M7nLEK1OKNC5V3jzK1UA:9 a=QEXdDO2ut3YA:10 a=NFOGd7dJGGMPyQGDc5-O:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.125,FMLib:17.12.100.49 definitions=2026-07-05_02,2026-07-03_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 suspectscore=0 spamscore=0 lowpriorityscore=0 clxscore=1015 phishscore=0 malwarescore=0 adultscore=0 priorityscore=1501 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2607060083 On 7/6/26 7:22 AM, Krishna Chaitanya Chundru wrote: > > > On 7/3/2026 8:39 PM, Konrad Dybcio wrote: >> On 7/3/26 2:38 PM, Krishna Chaitanya Chundru wrote: >>> The Eliza EVK board connects PCIe1 (8GT/s x2) to a Toshiba TC9563 >>> PCIe switch. Enable PCIe1 and its QMP PHY nodes. >>> >>> TC9563 uses I2C (at address 0x77 on I2C4) for its management interface. >>> >>> Override the base iommu-map with the expanded set covering all the >>> switch's downstream ports (0x1400-0x1408 SID range). >>> >>> The TC9563 RESX# and PERST# are OR-ed internally to assert reset on the >>> switch. Use TC9563 RESX# pin via a TLMM GPIO and skip wiring PERST# >>> from the PCIe controller. >>> >>> Signed-off-by: Krishna Chaitanya Chundru >>> --- >> [...] >> >>> +&pcie1 { >>> + pinctrl-names = "default"; >>> + pinctrl-0 = <&pcie1_default_state>; >> flipped order >> >> [...] >> >>> +&pcie1port0 { >> This port should also get the compatible > for pcie1 it is not required, only for m.2 connector we need the compatible. It will be required once someone else makes a board where this PCIe slot is routed Replying back and forth took more time than fixing the issue Konrad