From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1750925AbdE2IH6 (ORCPT ); Mon, 29 May 2017 04:07:58 -0400 Received: from mga02.intel.com ([134.134.136.20]:30092 "EHLO mga02.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750846AbdE2IH5 (ORCPT ); Mon, 29 May 2017 04:07:57 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.38,413,1491289200"; d="scan'208";a="862383388" Subject: Re: [PATCH 1/4] mmc: sdhci-esdhc: Add SDHCI_QUIRK_32BIT_DMA_ADDR To: =?UTF-8?Q?Beno=c3=aet_Th=c3=a9baudeau?= , linux-kernel@vger.kernel.org, linux-mmc@vger.kernel.org References: <1493805925-3644-1-git-send-email-benoit@wsystem.com> Cc: Ulf Hansson , Fabio Estevam , joancarles , =?UTF-8?Q?Eric_B=c3=a9nard?= , Wolfram Sang From: Adrian Hunter Organization: Intel Finland Oy, Registered Address: PL 281, 00181 Helsinki, Business Identity Code: 0357606 - 4, Domiciled in Helsinki Message-ID: Date: Mon, 29 May 2017 11:02:00 +0300 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.8.0 MIME-Version: 1.0 In-Reply-To: <1493805925-3644-1-git-send-email-benoit@wsystem.com> Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 03/05/17 13:05, Benoît Thébaudeau wrote: > The eSDHC can only DMA from 32-bit-aligned addresses. > > This fixes the following test cases of mmc_test: > 11: Badly aligned write > 12: Badly aligned read > 13: Badly aligned multi-block write > 14: Badly aligned multi-block read > > Signed-off-by: Benoît Thébaudeau I would expect to see Acks from other sdhci-esdhc users. Nevertheless for sdhci: Acked-by: Adrian Hunter > --- > drivers/mmc/host/sdhci-esdhc.h | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/mmc/host/sdhci-esdhc.h b/drivers/mmc/host/sdhci-esdhc.h > index c4bbd74..e7893f2 100644 > --- a/drivers/mmc/host/sdhci-esdhc.h > +++ b/drivers/mmc/host/sdhci-esdhc.h > @@ -19,6 +19,7 @@ > */ > > #define ESDHC_DEFAULT_QUIRKS (SDHCI_QUIRK_FORCE_BLK_SZ_2048 | \ > + SDHCI_QUIRK_32BIT_DMA_ADDR | \ > SDHCI_QUIRK_NO_BUSY_IRQ | \ > SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK | \ > SDHCI_QUIRK_PIO_NEEDS_DELAY | \ >